| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vminmaxnm.ll | 25 ; CHECK: fminnm.2s v0, v0, v1
27 %vminnm2.i = tail call <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind
32 ; CHECK: fminnm.4s v0, v0, v1
34 %vminnm2.i = tail call <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind
39 ; CHECK: fminnm.2d v0, v0, v1
41 %vminnm2.i = tail call <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind
45 declare <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double>, <2 x double>) nounwind readnone
46 declare <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
47 declare <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
|
| arm64-neon-add-sub.ll | 212 ; CHECK: fminnm d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
213 %1 = tail call <1 x double> @llvm.aarch64.neon.fminnm.v1f64(<1 x double> %a, <1 x double> %b)
232 declare <1 x double> @llvm.aarch64.neon.fminnm.v1f64(<1 x double>, <1 x double>)
|
| /external/llvm/test/MC/AArch64/ |
| neon-max-min.s | 103 fminnm v10.2s, v15.2s, v22.2s
104 fminnm v3.4s, v5.4s, v6.4s
105 fminnm v17.2d, v13.2d, v2.2d
107 // CHECK: fminnm v10.2s, v15.2s, v22.2s // encoding: [0xea,0xc5,0xb6,0x0e]
108 // CHECK: fminnm v3.4s, v5.4s, v6.4s // encoding: [0xa3,0xc4,0xa6,0x4e]
109 // CHECK: fminnm v17.2d, v13.2d, v2.2d // encoding: [0xb1,0xc5,0xe2,0x4e]
|
| arm64-fp-encoding.s | 44 fminnm s1, s2, s3
45 fminnm d1, d2, d3
49 ; CHECK: fminnm s1, s2, s3 ; encoding: [0x41,0x78,0x23,0x1e]
50 ; CHECK: fminnm d1, d2, d3 ; encoding: [0x41,0x78,0x63,0x1e]
|
| arm64-advsimd.s | 322 fminnm.2s v0, v0, v0
392 ; CHECK: fminnm.2s v0, v0, v0 ; encoding: [0x00,0xc4,0xa0,0x0e]
[all...] |
| /external/vixl/doc/ |
| changelog.md | 77 + Added support for `fmadd`, `fnmadd`, `fnmsub`, `fminnm`, `fmaxnm`,
|
| supported-instructions.md | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-scalar-fp.txt | 48 # CHECK: fminnm s1, s2, s3
49 # CHECK: fminnm d1, d2, d3
|
| /external/v8/src/arm64/ |
| constants-arm64.h | [all...] |
| disasm-arm64.cc | 1026 FORMAT(FMINNM, "fminnm");
[all...] |
| macro-assembler-arm64-inl.h | 696 void MacroAssembler::Fminnm(const FPRegister& fd,
700 fminnm(fd, fn, fm);
[all...] |
| assembler-arm64.cc | 1890 void Assembler::fminnm(const FPRegister& fd, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/vixl/a64/ |
| constants-a64.h | [all...] |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
| simulator-a64.h | [all...] |
| simulator-a64.cc | [all...] |
| assembler-a64.cc | [all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | 423 #include "traces/a64/sim-fminnm-2d-trace-a64.h"
424 #include "traces/a64/sim-fminnm-2s-trace-a64.h"
425 #include "traces/a64/sim-fminnm-4s-trace-a64.h"
426 #include "traces/a64/sim-fminnm-d-trace-a64.h"
427 #include "traces/a64/sim-fminnm-s-trace-a64.h"
[all...] |
| test-simulator-a64.cc | [all...] |
| test-disasm-a64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| fp_and_simd.stdout.exp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
