| /external/llvm/test/MC/AArch64/ |
| noneon-diagnostics.s | 4 fmla v3.4s, v12.4s, v17.4s
5 fmla v1.2d, v30.2d, v20.2d
6 fmla v9.2s, v9.2s, v0.2s
8 // CHECK-ERROR-NEXT: fmla v3.4s, v12.4s, v17.4s
11 // CHECK-ERROR-NEXT: fmla v1.2d, v30.2d, v20.2d
14 // CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
|
| neon-scalar-by-elem-mla.s | 6 fmla s0, s1, v1.s[0]
7 fmla s30, s11, v1.s[1]
8 fmla s4, s5, v7.s[2]
9 fmla s16, s22, v16.s[3]
10 fmla d0, d1, v1.d[0]
11 fmla d30, d11, v1.d[1]
13 // CHECK: fmla s0, s1, v1.s[0] // encoding: [0x20,0x10,0x81,0x5f]
14 // CHECK: fmla s30, s11, v1.s[1] // encoding: [0x7e,0x11,0xa1,0x5f]
15 // CHECK: fmla s4, s5, v7.s[2] // encoding: [0xa4,0x18,0x87,0x5f]
16 // CHECK: fmla s16, s22, v16.s[3] // encoding: [0xd0,0x1a,0xb0,0x5f
[all...] |
| arm64-diagno-predicate.s | 10 fmla v9.2s, v9.2s, v0.2s
12 // CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
|
| neon-mla-mls-instructions.s | 43 fmla v0.2s, v1.2s, v2.2s
44 fmla v0.4s, v1.4s, v2.4s
45 fmla v0.2d, v1.2d, v2.2d
47 // CHECK: fmla v0.2s, v1.2s, v2.2s // encoding: [0x20,0xcc,0x22,0x0e]
48 // CHECK: fmla v0.4s, v1.4s, v2.4s // encoding: [0x20,0xcc,0x22,0x4e]
49 // CHECK: fmla v0.2d, v1.2d, v2.2d // encoding: [0x20,0xcc,0x62,0x4e]
|
| neon-2velem.s | 49 fmla v0.2s, v1.2s, v2.s[2]
50 fmla v0.2s, v1.2s, v22.s[2]
51 fmla v3.4s, v8.4s, v2.s[1]
52 fmla v3.4s, v8.4s, v22.s[3]
53 fmla v0.2d, v1.2d, v2.d[1]
54 fmla v0.2d, v1.2d, v22.d[1]
56 // CHECK: fmla v0.2s, v1.2s, v2.s[2] // encoding: [0x20,0x18,0x82,0x0f]
57 // CHECK: fmla v0.2s, v1.2s, v22.s[2] // encoding: [0x20,0x18,0x96,0x0f]
58 // CHECK: fmla v3.4s, v8.4s, v2.s[1] // encoding: [0x03,0x11,0xa2,0x4f]
59 // CHECK: fmla v3.4s, v8.4s, v22.s[3] // encoding: [0x03,0x19,0xb6,0x4f
[all...] |
| arm64-advsimd.s | 325 fmla.2s v0, v0, v0
395 ; CHECK: fmla.2s v0, v0, v0 ; encoding: [0x00,0xcc,0x20,0x0e]
[all...] |
| neon-diagnostics.s | 128 fmla v0.2s, v1.2d, v2.2d
132 // CHECK-ERROR: fmla v0.2s, v1.2d, v2.2d
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fmuladd.ll | 16 ;CHECK: fmla.2s
17 ;CHECK-NOT: fmla.2s
27 ;CHECK: fmla.4s
28 ;CHECK-NOT: fmla.4s
38 ;CHECK: fmla.4s
39 ;CHECK: fmla.4s
40 ;CHECK-NOT: fmla.4s
61 ;CHECK: fmla.2d
62 ;CHECK-NOT: fmla.2d
72 ;CHECK: fmla.2
[all...] |
| neon-fma.ll | 4 ;CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
11 ;CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
18 ;CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
54 ;CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
60 ;CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
66 ;CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
97 ;CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
103 ;CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
109 ;CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
118 ;CHECK-NOT: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2
[all...] |
| neon-scalar-by-elem-fma.ll | 8 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
16 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
24 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
32 ; CHECK: {{fmla d[0-9]+, d[0-9]+, v[0-9]+.d\[0]|fmadd d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+}}
40 ; CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
48 ; CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
|
| arm64-neon-2velem-high.ll | 299 ; CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[{{[0-9]+}}]
309 ; CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[{{[0-9]+}}]
|
| arm64-vmul.ll | 445 ;CHECK: fmla.2s
455 ;CHECK: fmla.4s
465 ;CHECK: fmla.2d
576 ; CHECK-NEXT: fmla.2s
587 ; CHECK-NEXT: fmla.4s
599 ; CHECK-NEXT: fmla.2d
[all...] |
| arm64-neon-2velem.ll | 383 ; CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
395 ; CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
407 ; CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
417 ; CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
471 ; CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
483 ; CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[1]
515 ; CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
[all...] |
| /external/clang/test/CodeGen/ |
| aarch64-neon-fma.c | 14 // CHECK-FMA: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
23 // CHECK-FMA: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
32 // CHECK-FMA: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
67 // CHECK-FMA: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
75 // CHECK-FMA: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
83 // CHECK-FMA: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0]
91 // CHECK-FMA: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0]
131 // CHECK-FMA: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
139 // CHECK-FMA: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
147 // CHECK-FMA: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3
[all...] |
| aarch64-neon-scalar-x-indexed-elem.c | 87 // CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
93 // CHECK: {{fmla|fmadd}} {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+.d\[0\]|d[0-9]+}}
99 // CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[1]
111 // CHECK: {{fmla|fmadd}} {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+.d\[0\]|d[0-9]+}}
123 // CHECK: fmla {{d[0-9]+}}, {{d[0-9]+}}, {{v[0-9]+}}.d[0]
|
| aarch64-neon-2velem.c | 203 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
209 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1]
215 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
221 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
251 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0]
257 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[1]
275 // CHECK: fmla {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
[all...] |
| /external/vixl/examples/ |
| neon-matrix-multiply.cc | 37 // __ Fmla(v<v_out>.V4S(), v5.V4S(), v<s_column>.S(), 1);
38 // __ Fmla(v<v_out>.V4S(), v6.V4S(), v<s_column>.S(), 2);
39 // __ Fmla(v<v_out>.V4S(), v7.V4S(), v<s_column>.S(), 3);
53 __ Fmla(v_out, v5.V4S(), v_in, 1);
54 __ Fmla(v_out, v6.V4S(), v_in, 2);
55 __ Fmla(v_out, v7.V4S(), v_in, 3);
|
| /external/valgrind/docs/internals/ |
| MERGE_3_10_1.txt | 96 //339938 disInstr(arm64): unhandled instruction 0x4F8010A4 (fmla)
135 //14679 Add test cases for arm64 FMLA etc
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64A57FPLoadBalancing.cpp | 165 /// fmla d1<def>, ?, ?, d0<kill>
166 /// fmla d2<def>, ?, ?, d1<kill>
|
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| /external/vixl/src/vixl/a64/ |
| logic-a64.cc | 4051 LogicVRegister Simulator::fmla(VectorFormat vform, function in class:vixl::Simulator
4067 LogicVRegister Simulator::fmla(VectorFormat vform, function in class:vixl::Simulator
4292 LogicVRegister Simulator::fmla(VectorFormat vform, function in class:vixl::Simulator
[all...] |
| macro-assembler-a64.h | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-advsimd.txt | 310 # CHECK: fmla.2s v0, v0, v0
[all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | 440 #include "traces/a64/sim-fmla-2d-trace-a64.h"
441 #include "traces/a64/sim-fmla-2d-2d-d-trace-a64.h"
442 #include "traces/a64/sim-fmla-2s-trace-a64.h"
443 #include "traces/a64/sim-fmla-2s-2s-s-trace-a64.h"
444 #include "traces/a64/sim-fmla-4s-trace-a64.h"
445 #include "traces/a64/sim-fmla-4s-4s-s-trace-a64.h"
446 #include "traces/a64/sim-fmla-d-d-d-trace-a64.h"
447 #include "traces/a64/sim-fmla-s-s-s-trace-a64.h"
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | [all...] |
