| /external/clang/test/CodeGen/ |
| arm64-vrnd.c | 14 // CHECK: call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float>
16 // CHECK: call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float>
18 // CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
20 // CHECK: call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>
|
| aarch64-neon-misc.c | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vcvt.ll | 402 ;CHECK: frintn.2s v0, v0
404 %tmp3 = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %A)
411 ;CHECK: frintn.4s v0, v0
413 %tmp3 = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %A)
420 ;CHECK: frintn.2d v0, v0
422 %tmp3 = call <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double> %A)
426 declare <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float>) nounwind readnone
427 declare <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float>) nounwind readnone
428 declare <2 x double> @llvm.aarch64.neon.frintn.v2f64(<2 x double>) nounwind readnone
|
| /external/vixl/doc/ |
| changelog.md | 61 + Fixed simulation of `frintn` and `frinta` for corner cases.
|
| supported-instructions.md | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-scalar-fp.txt | 223 # CHECK: frintn s1, s2
224 # CHECK: frintn d1, d2
|
| /external/llvm/test/MC/AArch64/ |
| arm64-fp-encoding.s | 386 frintn s1, s2
387 frintn d1, d2
389 ; CHECK: frintn s1, s2 ; encoding: [0x41,0x40,0x24,0x1e]
390 ; CHECK: frintn d1, d2 ; encoding: [0x41,0x40,0x64,0x1e]
|
| neon-simd-misc.s | 453 frintn v6.4s, v8.4s
454 frintn v6.2d, v8.2d
455 frintn v4.2s, v0.2s
457 // CHECK: frintn v6.4s, v8.4s // encoding: [0x06,0x89,0x21,0x4e]
458 // CHECK: frintn v6.2d, v8.2d // encoding: [0x06,0x89,0x61,0x4e]
459 // CHECK: frintn v4.2s, v0.2s // encoding: [0x04,0x88,0x21,0x0e]
|
| /external/v8/test/cctest/ |
| test-assembler-arm64.cc | [all...] |
| test-disasm-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | [all...] |
| test-disasm-a64.cc | [all...] |
| test-simulator-traces-a64.h | 518 #include "traces/a64/sim-frintn-2d-trace-a64.h"
519 #include "traces/a64/sim-frintn-2s-trace-a64.h"
520 #include "traces/a64/sim-frintn-4s-trace-a64.h"
521 #include "traces/a64/sim-frintn-d-trace-a64.h"
522 #include "traces/a64/sim-frintn-s-trace-a64.h"
[all...] |
| test-simulator-a64.cc | [all...] |
| /external/v8/src/arm64/ |
| disasm-arm64.cc | 995 FORMAT(FRINTN, "frintn");
[all...] |
| macro-assembler-arm64-inl.h | 822 void MacroAssembler::Frintn(const FPRegister& fd, const FPRegister& fn) {
824 frintn(fd, fn);
[all...] |
| constants-arm64.h | [all...] |
| assembler-arm64.cc | 1932 void Assembler::frintn(const FPRegister& fd, function in class:v8::internal::Assembler
[all...] |
| /art/compiler/dex/quick/arm64/ |
| arm64_lir.h | 284 kA64Frintn2ff, // frintn [000111100s100100010000] rn[9-5] rd[4-0].
|
| assemble_arm64.cc | 340 "frintn", "!0f, !1f", kFixupNone),
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm64.cc | 511 __ Frintn(DRegisterFrom(locations->Out()), DRegisterFrom(locations->InAt(0)));
[all...] |
| /external/vixl/src/vixl/a64/ |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
| constants-a64.h | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
