| /external/vixl/ |
| README.md | 111 `stlrh`, `stlr`, `ldarb`, `ldarh`, `ldar`, `clrex`.
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| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrAtomics.td | 44 def : Pat<(acquiring_load<atomic_load_8> GPR64sp:$ptr), (LDARB GPR64sp:$ptr)>;
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| AArch64InstrInfo.td | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| atomic-ops.ll | [all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-memory.s | 488 ldarb w4, [sp]
493 ; CHECK: ldarb w4, [sp] ; encoding: [0xe4,0xff,0xdf,0x08]
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| basic-a64-instructions.s | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-memory.txt | 474 # CHECK: ldarb w4, [sp]
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| basic-a64-instructions.txt | [all...] |
| /art/compiler/optimizing/ |
| code_generator_arm64.cc | 860 __ Ldarb(Register(dst), base);
864 __ Ldarb(Register(dst), base);
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | 529 ### LDARB ###
533 void ldarb(const Register& rt, const MemOperand& src)
[all...] |
| /external/vixl/src/vixl/a64/ |
| macro-assembler-a64.h | [all...] |
| disasm-a64.cc | 1040 case LDARB_w: mnemonic = "ldarb"; form = "'Wt, ['Xns]"; break;
[all...] |
| assembler-a64.h | [all...] |
| assembler-a64.cc | 1830 void Assembler::ldarb(const Register& rt, function in class:vixl::Assembler
[all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | [all...] |
| test-assembler-a64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | [all...] |
| /external/valgrind/none/tests/arm64/ |
| memory.c | 288 TESTINST2_hide2("ldarb w21, [x22]", AREA_MID, x21,x22,0);
[all...] |
| memory.stdout.exp | 99 ldarb w21, [x22] :: rd 00000000000000f0 rn (hidden), cin 0, nzcv 00000000
[all...] |
| /prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/x86_64-linux-gnu/aarch64-linux-android/lib/ |
| libopcodes.a | [all...] |
