| /external/vixl/ |
| README.md | 110 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrAtomics.td | 256 (SUBREG_TO_REG (i64 0), (LDAXRH GPR64sp:$addr), sub_32)>;
264 (SUBREG_TO_REG (i64 0), (LDAXRH GPR64sp:$addr), sub_32)>;
|
| AArch64InstrInfo.td | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| atomic-ops.ll | 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
442 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
622 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
719 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
912 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
[all...] |
| arm64-ldxr-stxr.ll | 188 ; CHECK: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
|
| /external/llvm/test/MC/AArch64/ |
| arm64-memory.s | 513 ldaxrh w2, [x4]
520 ; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48]
|
| basic-a64-instructions.s | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-memory.txt | 501 # CHECK: ldaxrh w2, [x4]
|
| basic-a64-instructions.txt | [all...] |
| /external/vixl/doc/ |
| supported-instructions.md | 564 ### LDAXRH ###
568 void ldaxrh(const Register& rt, const MemOperand& src)
[all...] |
| /external/vixl/src/vixl/a64/ |
| macro-assembler-a64.h | [all...] |
| disasm-a64.cc | 1029 case LDAXRH_w: mnemonic = "ldaxrh"; form = "'Wt, ['Xns]"; break;
[all...] |
| assembler-a64.h | [all...] |
| assembler-a64.cc | 1772 void Assembler::ldaxrh(const Register& rt, function in class:vixl::Assembler
[all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | [all...] |
| test-assembler-a64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | [all...] |
| /prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/x86_64-linux-gnu/aarch64-linux-android/lib/ |
| libopcodes.a | [all...] |
