/external/vixl/ |
README.md | 109 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
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/external/llvm/lib/Target/AArch64/ |
AArch64InstrAtomics.td | 221 (SUBREG_TO_REG (i64 0), (LDXRB GPR64sp:$addr), sub_32)>; 229 (SUBREG_TO_REG (i64 0), (LDXRB GPR64sp:$addr), sub_32)>;
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AArch64InstrInfo.td | [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-ldxr-stxr.ll | 37 ; CHECK: ldxrb w[[LOADVAL:[0-9]+]], [x0]
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atomic-ops.ll | 103 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] 183 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] 423 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] 695 ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] [all...] |
/external/llvm/test/MC/AArch64/ |
arm64-memory.s | 458 ldxrb w6, [x1] 463 ; CHECK: ldxrb w6, [x1] ; encoding: [0x26,0x7c,0x5f,0x08]
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basic-a64-instructions.s | [all...] |
/external/valgrind/memcheck/tests/ |
atomic_incs.c | 125 "ldxrb w8, [x9]" "\n\t"
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/external/llvm/test/MC/Disassembler/AArch64/ |
arm64-memory.txt | 444 # CHECK: ldxrb w6, [x1]
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basic-a64-instructions.txt | [all...] |
/external/vixl/doc/ |
supported-instructions.md | 732 ### LDXRB ### 736 void ldxrb(const Register& rt, const MemOperand& src) [all...] |
/external/vixl/src/vixl/a64/ |
macro-assembler-a64.h | [all...] |
disasm-a64.cc | 1016 case LDXRB_w: mnemonic = "ldxrb"; form = "'Wt, ['Xns]"; break; [all...] |
assembler-a64.h | [all...] |
assembler-a64.cc | 1697 void Assembler::ldxrb(const Register& rt, function in class:vixl::Assembler [all...] |
/external/vixl/test/ |
test-disasm-a64.cc | [all...] |
test-assembler-a64.cc | [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | [all...] |
/external/valgrind/VEX/priv/ |
host_arm64_defs.c | [all...] |
/prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/x86_64-linux-gnu/aarch64-linux-android/lib/ |
libopcodes.a | [all...] |