| /external/llvm/test/MC/AArch64/ |
| neon-scalar-by-elem-saturating-mla.s | 25 sqdmlsl s1, h1, v1.h[0]
26 sqdmlsl s8, h2, v5.h[1]
27 sqdmlsl s12, h13, v14.h[2]
28 sqdmlsl s29, h28, v11.h[7]
29 sqdmlsl d1, s1, v13.s[0]
30 sqdmlsl d31, s31, v31.s[2]
31 sqdmlsl d16, s18, v28.s[3]
33 // CHECK: sqdmlsl s1, h1, v1.h[0] // encoding: [0x21,0x70,0x41,0x5f]
34 // CHECK: sqdmlsl s8, h2, v5.h[1] // encoding: [0x48,0x70,0x55,0x5f]
35 // CHECK: sqdmlsl s12, h13, v14.h[2] // encoding: [0xac,0x71,0x6e,0x5f
[all...] |
| neon-scalar-mul.s | 49 sqdmlsl s14, h12, h25
50 sqdmlsl d12, s23, s13
52 // CHECK: sqdmlsl s14, h12, h25 // encoding: [0x8e,0xb1,0x79,0x5e]
53 // CHECK: sqdmlsl d12, s23, s13 // encoding: [0xec,0xb2,0xad,0x5e]
|
| neon-2velem.s | 147 sqdmlsl v0.4s, v1.4h, v2.h[2]
148 sqdmlsl v0.2d, v1.2s, v2.s[2]
149 sqdmlsl v0.2d, v1.2s, v22.s[2]
154 // CHECK: sqdmlsl v0.4s, v1.4h, v2.h[2] // encoding: [0x20,0x70,0x62,0x0f]
155 // CHECK: sqdmlsl v0.2d, v1.2s, v2.s[2] // encoding: [0x20,0x78,0x82,0x0f]
156 // CHECK: sqdmlsl v0.2d, v1.2s, v22.s[2] // encoding: [0x20,0x78,0x96,0x0f]
|
| neon-3vdiff.s | 257 sqdmlsl v0.4s, v1.4h, v2.4h
258 sqdmlsl v0.2d, v1.2s, v2.2s
260 // CHECK: sqdmlsl v0.4s, v1.4h, v2.4h // encoding: [0x20,0xb0,0x62,0x0e]
261 // CHECK: sqdmlsl v0.2d, v1.2s, v2.2s // encoding: [0x20,0xb0,0xa2,0x0e]
|
| neon-diagnostics.s | [all...] |
| arm64-advsimd.s | [all...] |
| /external/clang/test/CodeGen/ |
| aarch64-neon-scalar-x-indexed-elem.c | 235 // CHECK: sqdmlsl {{s[0-9]+|v[0-9]+.4s}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[3]
241 // CHECK: sqdmlsl {{d[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
247 // CHECK: sqdmlsl {{s[0-9]+|v[0-9]+.4s}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[7]
253 // CHECK: sqdmlsl {{d[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
|
| aarch64-neon-2velem.c | 611 // CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
617 // CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
[all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | [all...] |
| test-disasm-a64.cc | [all...] |
| test-simulator-a64.cc | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| neon-instructions.txt | [all...] |
| arm64-advsimd.txt | [all...] |
| /external/vixl/doc/ |
| supported-instructions.md | [all...] |
| /external/vixl/src/vixl/a64/ |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
| simulator-a64.cc | [all...] |
| logic-a64.cc | 1055 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, function in class:vixl::Simulator
3225 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, function in class:vixl::Simulator
[all...] |
| simulator-a64.h | [all...] |
| assembler-a64.h | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vmul.ll | 353 ;CHECK: sqdmlsl.4s
364 ;CHECK: sqdmlsl.2d
[all...] |
| arm64-neon-3vdiff.ll | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64SchedCyclone.td | 523 "SQDMLAL","SQDMLSL")>;
|
| AArch64InstrInfo.td | [all...] |
