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  /external/protobuf/src/google/protobuf/stubs/
atomicops_internals_arm64_gcc.h 156 "stlr %w[value], %[ptr] \n\t"
292 "stlr %x[value], %[ptr] \n\t"
  /external/v8/src/base/
atomicops_internals_arm64_gcc.h 139 "stlr %w[value], %[ptr] \n\t"
285 "stlr %x[value], %[ptr] \n\t"
  /external/vixl/
README.md 111 `stlrh`, `stlr`, `ldarb`, `ldarh`, `ldar`, `clrex`.
  /external/llvm/test/CodeGen/AArch64/
arm64-atomic.ll 221 ; CHECK: stlr
atomic-ops.ll     [all...]
  /external/llvm/test/MC/AArch64/
arm64-memory.s 496 stlr w3, [x6]
497 stlr x3, [x6]
501 ; CHECK: stlr w3, [x6] ; encoding: [0xc3,0xfc,0x9f,0x88]
502 ; CHECK: stlr x3, [x6] ; encoding: [0xc3,0xfc,0x9f,0xc8]
basic-a64-instructions.s     [all...]
  /external/llvm/test/MC/Disassembler/AArch64/
arm64-memory.txt 482 # CHECK: stlr w3, [x6]
483 # CHECK: stlr x3, [x6]
basic-a64-instructions.txt     [all...]
  /art/compiler/optimizing/
code_generator_arm64.cc     [all...]
  /external/vixl/doc/
supported-instructions.md 1078 ### STLR ###
1082 void stlr(const Register& rt, const MemOperand& dst)
    [all...]
  /external/vixl/src/vixl/a64/
disasm-a64.cc 1038 case STLR_w: mnemonic = "stlr"; form = "'Wt, ['Xns]"; break;
1039 case STLR_x: mnemonic = "stlr"; form = "'Xt, ['Xns]"; break;
    [all...]
macro-assembler-a64.h     [all...]
assembler-a64.h     [all...]
assembler-a64.cc 1822 void Assembler::stlr(const Register& rt, function in class:vixl::Assembler
    [all...]
  /external/vixl/test/
test-disasm-a64.cc     [all...]
test-assembler-a64.cc     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 589 // ldar and stlr have much more restrictive addressing modes (just a
    [all...]
AArch64InstrInfo.td     [all...]
  /external/valgrind/VEX/priv/
guest_arm64_toIR.c     [all...]
  /prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/x86_64-linux-gnu/aarch64-linux-android/lib/
libopcodes.a     [all...]

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