/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_advsimd_Blend.S | 81 umull2 v12.8h, v7.16b, v0.16b 83 umull2 v13.8h, v7.16b, v1.16b 85 umull2 v14.8h, v7.16b, v2.16b 87 umull2 v15.8h, v7.16b, v3.16b 127 umull2 v12.8h, v7.16b, v8.16b 129 umull2 v13.8h, v7.16b, v9.16b 131 umull2 v14.8h, v7.16b, v10.16b 133 umull2 v15.8h, v7.16b, v11.16b 171 umull2 v12.8h, v3.16b, v8.16b 173 umull2 v13.8h, v3.16b, v9.16 [all...] |
rsCpuIntrinsics_advsimd_YuvToRGB.S | 67 umull2 v5.8h, v8.16b, v24.16b // g0_hi = y0_hi * 149 68 umull2 v21.8h, v9.16b, v24.16b // g1_hi = y1_hi * 149 72 umull2 v9.8h, \regu\().16b, v25.16b // g2_hi = u_hi * 50 + v_hi * 104 93 umull2 v14.8h, \regv\().16b, v27.16b // r2_hi = v_hi * 204 94 umull2 v15.8h, \regu\().16b, v28.16b // b2_hi = u_hi * 254
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rsCpuIntrinsics_advsimd_Blur.S | 85 umull2 v13.4s, v14.8h, v0.h[0] 89 umull2 v15.4s, v15.8h, v0.h[0] 162 umull2 v15.4s, v9.8h, v0.h[0] 236 umull2 v15.4s, v8.8h, v0.h[0] 371 umull2 v15.4s, v12.8h, v0.h[0] 572 umull2 v15.4s, v7.8h, v0.h[0] 626 umull2 v15.4s, v4.8h, v0.h[0] 716 umull2 v15.4s, v28.8h, v0.h[0] [all...] |
rsCpuIntrinsics_advsimd_Resize.S | 61 umull2 v13.4s, v9.8h, v3.h[1]
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/external/llvm/test/MC/AArch64/ |
neon-2velem.s | 220 umull2 v0.4s, v1.8h, v2.h[2] 221 umull2 v0.2d, v1.4s, v2.s[2] 222 umull2 v0.2d, v1.4s, v22.s[2] 227 // CHECK: umull2 v0.4s, v1.8h, v2.h[2] // encoding: [0x20,0xa0,0x62,0x6f] 228 // CHECK: umull2 v0.2d, v1.4s, v2.s[2] // encoding: [0x20,0xa8,0x82,0x6f] 229 // CHECK: umull2 v0.2d, v1.4s, v22.s[2] // encoding: [0x20,0xa8,0x96,0x6f]
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neon-3vdiff.s | 233 umull2 v0.8h, v1.16b, v2.16b 234 umull2 v0.4s, v1.8h, v2.8h 235 umull2 v0.2d, v1.4s, v2.4s 237 // CHECK: umull2 v0.8h, v1.16b, v2.16b // encoding: [0x20,0xc0,0x22,0x6e] 238 // CHECK: umull2 v0.4s, v1.8h, v2.8h // encoding: [0x20,0xc0,0x62,0x6e] 239 // CHECK: umull2 v0.2d, v1.4s, v2.4s // encoding: [0x20,0xc0,0xa2,0x6e]
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arm64-advsimd.s | [all...] |
neon-diagnostics.s | [all...] |
/external/clang/test/CodeGen/ |
aarch64-neon-2velem.c | 527 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3] 533 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1] 575 // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7] 581 // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3] [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-neon-2velem-high.ll | 56 ; CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h 70 ; CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
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arm64-vmul.ll | [all...] |
arm64-neon-3vdiff.ll | [all...] |
/external/vixl/doc/ |
supported-instructions.md | [all...] |
/external/vixl/src/vixl/a64/ |
macro-assembler-a64.h | [all...] |
logic-a64.cc | 899 LogicVRegister Simulator::umull2(VectorFormat vform, function in class:vixl::Simulator 907 return umull2(vform, dst, src1, dup_element(indexform, temp, src2, index)); 3073 LogicVRegister Simulator::umull2(VectorFormat vform, function in class:vixl::Simulator [all...] |
simulator-a64.h | [all...] |
assembler-a64.h | [all...] |
simulator-a64.cc | [all...] |
assembler-a64.cc | [all...] |
/external/vixl/test/ |
test-simulator-traces-a64.h | [all...] |
test-disasm-a64.cc | [all...] |
/prebuilts/gcc/darwin-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9.x-google/include/ |
arm_neon.h | [all...] |
/prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9.x-google/include/ |
arm_neon.h | [all...] |
/external/valgrind/none/tests/arm64/ |
fp_and_simd.c | [all...] |
/external/llvm/test/MC/Disassembler/AArch64/ |
arm64-advsimd.txt | [all...] |