/external/llvm/test/MC/AArch64/ |
neon-scalar-shift-imm.s | 135 uqshrn b12, h10, #7 136 uqshrn h10, s14, #5 137 uqshrn s10, d12, #13 139 // CHECK: uqshrn b12, h10, #7 // encoding: [0x4c,0x95,0x09,0x7f] 140 // CHECK: uqshrn h10, s14, #5 // encoding: [0xca,0x95,0x1b,0x7f] 141 // CHECK: uqshrn s10, d12, #13 // encoding: [0x8a,0x95,0x33,0x7f]
|
arm64-advsimd.s | [all...] |
neon-simd-shift.s | 350 uqshrn v0.8b, v1.8h, #3 351 uqshrn v0.4h, v1.4s, #3 352 uqshrn v0.2s, v1.2d, #3 357 // CHECK: uqshrn v0.8b, v1.8h, #3 // encoding: [0x20,0x94,0x0d,0x2f] 358 // CHECK: uqshrn v0.4h, v1.4s, #3 // encoding: [0x20,0x94,0x1d,0x2f] 359 // CHECK: uqshrn v0.2s, v1.2d, #3 // encoding: [0x20,0x94,0x3d,0x2f]
|
neon-diagnostics.s | [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-neon-simd-shift.ll | 468 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> %b, i32 3) 479 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> %b, i32 9) 491 %vqshrn = tail call <2 x i32> @llvm.aarch64.neon.uqshrn.v2i32(<2 x i64> %b, i32 19) 590 declare <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16>, i32) 592 declare <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32>, i32) 594 declare <2 x i32> @llvm.aarch64.neon.uqshrn.v2i32(<2 x i64>, i32)
|
arm64-vshift.ll | [all...] |
/external/valgrind/none/tests/arm64/ |
fp_and_simd.c | [all...] |
/external/llvm/test/MC/Disassembler/AArch64/ |
arm64-advsimd.txt | [all...] |
neon-instructions.txt | [all...] |
/external/vixl/test/ |
test-simulator-traces-a64.h | [all...] |
test-disasm-a64.cc | [all...] |
test-simulator-a64.cc | [all...] |
/external/vixl/doc/ |
supported-instructions.md | [all...] |
/external/vixl/src/vixl/a64/ |
disasm-a64.cc | [all...] |
macro-assembler-a64.h | [all...] |
simulator-a64.cc | [all...] |
simulator-a64.h | [all...] |
assembler-a64.h | [all...] |
logic-a64.cc | 2653 LogicVRegister Simulator::uqshrn(VectorFormat vform, function in class:vixl::Simulator [all...] |
assembler-a64.cc | [all...] |
/external/valgrind/VEX/priv/ |
host_arm64_defs.c | 778 case ARM64vecshi_UQSHRN2SD: *nm = "uqshrn"; *ar = "2sd"; return; 779 case ARM64vecshi_UQSHRN4HS: *nm = "uqshrn"; *ar = "4hs"; return; 780 case ARM64vecshi_UQSHRN8BH: *nm = "uqshrn"; *ar = "8bh"; return; [all...] |
guest_arm64_toIR.c | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.td | [all...] |
/external/clang/test/CodeGen/ |
aarch64-neon-intrinsics.c | [all...] |
/prebuilts/android-emulator/linux-x86_64/lib/gles_mesa/ |
libGL.so | |