1 # Sample variables file for BCM94356 WLBGA iPA, eLNA+switch board with PCIe for production package 2 # History: 3 # 1. July 24 2014 - updated pa parameters by BRCM 4 # 2. August 22 2014 - updated pa parameters by MOTO (John Ballen) 5 # 3. September 19 2014 - use GPIO instead of PCIe to wake up the host (Andrey Gostev) 6 # Following fields WILL be written into OTP 7 8 # Following fields WILL NOT be written in OTP 9 # [NVRAM ONLY] 10 NVRAMRev=$Rev: 373428 $ 11 sromrev=11 12 boardrev=0x1101 13 macaddr=00:90:4c:19:80:01 14 boardtype=0x0732 15 boardflags=0x12401201 16 #enable LNA1 bypass for both 2G & 5G 17 boardflags2=0x00802000 18 boardflags3=0x4800018a 19 #boardnum=57410 20 ccode=0 21 regrev=0 22 antswitch=0 23 pdgain5g=4 24 pdgain2g=4 25 tworangetssi2g=0 26 tworangetssi5g=0 27 paprdis=0 28 femctrl=10 29 vendid=0x14e4 30 devid=0x43ec 31 manfid=0x2d0 32 #prodid=0x052e 33 nocrc=1 34 otpimagesize=484 35 xtalfreq=37400 36 rxgains2gtrelnabypa0=1 37 rxgains2gtrelnabypa1=1 38 #2G elna gain from datasheet is 14dB 39 #2G elna gain changed to 12dB 40 rxgains2gelnagaina0=3 41 rxgains2gelnagaina1=3 42 #triso values for 2G are picked from older nvram. Might need to change. 43 rxgains2gtrisoa0=6 44 rxgains2gtrisoa1=6 45 rxgains5gtrelnabypa0=1 46 rxgains5gmtrelnabypa0=1 47 rxgains5ghtrelnabypa0=1 48 rxgains5gtrelnabypa1=1 49 rxgains5gmtrelnabypa1=1 50 rxgains5ghtrelnabypa1=1 51 #5G elna gain from datasheet is 12dB 52 rxgains5gelnagaina0=3 53 rxgains5gmelnagaina0=3 54 rxgains5ghelnagaina0=3 55 rxgains5gelnagaina1=3 56 rxgains5gmelnagaina1=3 57 rxgains5ghelnagaina1=3 58 #triso values for 5G are picked from older nvram. Might need to change. 59 rxgains5gtrisoa0=5 60 rxgains5gmtrisoa0=6 61 rxgains5ghtrisoa0=6 62 rxgains5gtrisoa1=5 63 rxgains5gmtrisoa1=6 64 rxgains5ghtrisoa1=6 65 rxchain=3 66 txchain=3 67 aa2g=3 68 aa5g=3 69 agbg0=2 70 agbg1=2 71 aga0=2 72 aga1=2 73 tssipos2g=1 74 extpagain2g=2 75 tssipos5g=1 76 extpagain5g=2 77 tempthresh=120 78 tempoffset=255 79 rawtempsense=0x1ff 80 pa2ga0=-152,5791,-672 81 pa2ga1=-135,6043,-685 82 pa2gccka0=-167,6004,-717 83 pa2gccka1=-171,6024,-725 84 pa5ga0=-228,5211,-665,-229,5136,-656,-219,5440,-690,-225,5321,-677 85 pa5ga1=-190,6045,-742,-172,6243,-743,-204,5889,-726,-208,5853,-727 86 subband5gver=0x4 87 pdoffsetcckma0=0x3333 88 pdoffsetcckma1=0x3333 89 pdoffset40ma0=0x0000 90 pdoffset80ma0=0x0000 91 pdoffset40ma1=0x0000 92 pdoffset80ma1=0x0000 93 maxp2ga0=74 94 maxp5ga0=74,74,74,74 95 maxp2ga1=74 96 maxp5ga1=74,74,74,74 97 cckbw202gpo=0x0000 98 cckbw20ul2gpo=0x0000 99 mcsbw202gpo=0xa9855422 100 mcsbw402gpo=0xa9855422 101 dot11agofdmhrbw202gpo=0x5542 102 ofdmlrbw202gpo=0x0022 103 mcsbw205glpo=0xa9866663 104 mcsbw405glpo=0xb9966664 105 mcsbw805glpo=0xbb866665 106 mcsbw205gmpo=0xd9866663 107 mcsbw405gmpo=0xa9866663 108 mcsbw805gmpo=0xcc866665 109 mcsbw205ghpo=0xdc866663 110 mcsbw405ghpo=0xaa866663 111 mcsbw805ghpo=0xdd866665 112 mcslr5glpo=0x0000 113 mcslr5gmpo=0x0000 114 mcslr5ghpo=0x0000 115 sb20in40hrpo=0x0 116 sb20in80and160hr5glpo=0x0 117 sb40and80hr5glpo=0x0 118 sb20in80and160hr5gmpo=0x0 119 sb40and80hr5gmpo=0x0 120 sb20in80and160hr5ghpo=0x0 121 sb40and80hr5ghpo=0x0 122 sb20in40lrpo=0x0 123 sb20in80and160lr5glpo=0x0 124 sb40and80lr5glpo=0x0 125 sb20in80and160lr5gmpo=0x0 126 sb40and80lr5gmpo=0x0 127 sb20in80and160lr5ghpo=0x0 128 sb40and80lr5ghpo=0x0 129 dot11agduphrpo=0x0 130 dot11agduplrpo=0x0 131 phycal_tempdelta=25 132 temps_period=15 133 temps_hysteresis=15 134 AvVmid_c0=2,140,2,145,2,145,2,145,2,145 135 AvVmid_c1=2,140,2,145,2,145,2,145,2,145 136 AvVmid_c2=0,0,0,0,0,0,0,0,0,0 137 rssicorrnorm_c0=4,4 138 rssicorrnorm_c1=4,4 139 rssicorrnorm5g_c0=1,2,3,1,2,3,1,2,3,1,2,3 140 rssicorrnorm5g_c1=1,2,3,1,2,3,1,2,3,1,2,3 141 epsdelta2g0=0 142 epsdelta2g1=0 143 ofdmfilttype=1 144 swctrlmap_2g=0x00001040,0xC0300000,0x40200000,0x803020,0x0ff 145 swctrlmap_5g=0x00000202,0x05050000,0x01010000,0x000000,0x047 146 swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 147 swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 148 ltecxmux=0x534201 149 btc_mode=1 150 cckdigfilttype=1 151 cck_onecore_tx = 1 152 host_wake_opt=0 153 phy4350_ss_opt=1 154 #PCIe Header Values 155 #pciehdr_00=0x380f 156 #pciehdr_01=0x3800 157 #pciehdr_02=${boardtype} 158 #pciehdr_03=${vendid} 159 #pciehdr_04=0x021c 160 #pciehdr_05=0x1b7e 161 #pciehdr_06=0x0a00 162 #pciehdr_07=0x0000 163 #pciehdr_08=0x0000 164 #pciehdr_09=0x0000 165 #pciehdr_10=0x0000 166 #pciehdr_11=0x0000 167 #pciehdr_12=0x00d4 168 #pciehdr_13=0x253c 169 #pciehdr_14=0x2164 170 #pciehdr_15=0x3203 171 #pciehdr_16=0x3e5f 172 #pciehdr_17=0x9605 173 #pciehdr_18=0x9f2f 174 #pciehdr_19=0x79b6 175 #pciehdr_20=0x8080 176 #pciehdr_21=0x0c03 177 #pciehdr_22=0x4000 178 #pciehdr_23=0x3240 179 #pciehdr_24=0x5f00 180 #pciehdr_25=0x4df4 181 #pciehdr_26=0x8090 182 #pciehdr_27=0xee00 183 #pciehdr_28=0x8630 184 #pciehdr_29=0x0180 185 #pciehdr_30=0x002b 186 #pciehdr_31=0x0000 187 #pciehdr_32=0x0000 188 #pciehdr_33=0x0000 189 #pciehdr_34=0x0000 190 #pciehdr_35=0x0000 191 #pciehdr_36=0x0000 192 #pciehdr_37=0x0000 193 #pciehdr_38=0x0000 194 #pciehdr_39=0x0000 195 #pciehdr_40=0x0000 196 #pciehdr_41=0x0000 197 #pciehdr_42=0x8800 198 #pciehdr_43=0x030a 199 #pciehdr_44=0x0160 200 #pciehdr_45=0x0000 201 #pciehdr_46=0x0000 202 #pciehdr_47=0x0000 203 #pciehdr_48=${devid} 204 #pciehdr_49=0x8000 205 #pciehdr_50=0x0002 206 #pciehdr_51=0x0000 207 #pciehdr_52=0x3ff5 208 #pciehdr_53=0x1800 209 #pciehdr_54=0x0000 210 #pciehdr_55=0x0000 211 #pciehdr_56=0x0000 212 #pciehdr_57=0x0000 213 #pciehdr_58=0x0000 214 #pciehdr_59=0x0000 215 #pciehdr_60=0x0000 216 #pciehdr_61=0x0000 217 #pciehdr_62=0x0000 218 #pciehdr_63=0x0000 219
