1 #ifndef _MSM_KGSL_H 2 #define _MSM_KGSL_H 3 4 #define KGSL_VERSION_MAJOR 3 5 #define KGSL_VERSION_MINOR 11 6 7 /*context flags */ 8 #define KGSL_CONTEXT_SAVE_GMEM 0x00000001 9 #define KGSL_CONTEXT_NO_GMEM_ALLOC 0x00000002 10 #define KGSL_CONTEXT_SUBMIT_IB_LIST 0x00000004 11 #define KGSL_CONTEXT_CTX_SWITCH 0x00000008 12 #define KGSL_CONTEXT_PREAMBLE 0x00000010 13 #define KGSL_CONTEXT_TRASH_STATE 0x00000020 14 #define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040 15 16 #define KGSL_CONTEXT_INVALID 0xffffffff 17 18 /* Memory allocayion flags */ 19 #define KGSL_MEMFLAGS_GPUREADONLY 0x01000000 20 21 /* generic flag values */ 22 #define KGSL_FLAGS_NORMALMODE 0x00000000 23 #define KGSL_FLAGS_SAFEMODE 0x00000001 24 #define KGSL_FLAGS_INITIALIZED0 0x00000002 25 #define KGSL_FLAGS_INITIALIZED 0x00000004 26 #define KGSL_FLAGS_STARTED 0x00000008 27 #define KGSL_FLAGS_ACTIVE 0x00000010 28 #define KGSL_FLAGS_RESERVED0 0x00000020 29 #define KGSL_FLAGS_RESERVED1 0x00000040 30 #define KGSL_FLAGS_RESERVED2 0x00000080 31 #define KGSL_FLAGS_SOFT_RESET 0x00000100 32 #define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200 33 34 /* Clock flags to show which clocks should be controled by a given platform */ 35 #define KGSL_CLK_SRC 0x00000001 36 #define KGSL_CLK_CORE 0x00000002 37 #define KGSL_CLK_IFACE 0x00000004 38 #define KGSL_CLK_MEM 0x00000008 39 #define KGSL_CLK_MEM_IFACE 0x00000010 40 #define KGSL_CLK_AXI 0x00000020 41 42 /* 43 * Reset status values for context 44 */ 45 enum kgsl_ctx_reset_stat { 46 KGSL_CTX_STAT_NO_ERROR = 0x00000000, 47 KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001, 48 KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002, 49 KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003 50 }; 51 52 #define KGSL_MAX_PWRLEVELS 5 53 54 #define KGSL_CONVERT_TO_MBPS(val) \ 55 (val*1000*1000U) 56 57 /* device id */ 58 enum kgsl_deviceid { 59 KGSL_DEVICE_3D0 = 0x00000000, 60 KGSL_DEVICE_2D0 = 0x00000001, 61 KGSL_DEVICE_2D1 = 0x00000002, 62 KGSL_DEVICE_MAX = 0x00000003 63 }; 64 65 enum kgsl_user_mem_type { 66 KGSL_USER_MEM_TYPE_PMEM = 0x00000000, 67 KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001, 68 KGSL_USER_MEM_TYPE_ADDR = 0x00000002, 69 KGSL_USER_MEM_TYPE_ION = 0x00000003, 70 KGSL_USER_MEM_TYPE_MAX = 0x00000004, 71 }; 72 73 struct kgsl_devinfo { 74 75 unsigned int device_id; 76 /* chip revision id 77 * coreid:8 majorrev:8 minorrev:8 patch:8 78 */ 79 unsigned int chip_id; 80 unsigned int mmu_enabled; 81 unsigned int gmem_gpubaseaddr; 82 /* 83 * This field contains the adreno revision 84 * number 200, 205, 220, etc... 85 */ 86 unsigned int gpu_id; 87 unsigned int gmem_sizebytes; 88 }; 89 90 /* this structure defines the region of memory that can be mmap()ed from this 91 driver. The timestamp fields are volatile because they are written by the 92 GPU 93 */ 94 struct kgsl_devmemstore { 95 volatile unsigned int soptimestamp; 96 unsigned int sbz; 97 volatile unsigned int eoptimestamp; 98 unsigned int sbz2; 99 volatile unsigned int ts_cmp_enable; 100 unsigned int sbz3; 101 volatile unsigned int ref_wait_ts; 102 unsigned int sbz4; 103 unsigned int current_context; 104 unsigned int sbz5; 105 }; 106 107 #define KGSL_MEMSTORE_OFFSET(ctxt_id, field) \ 108 ((ctxt_id)*sizeof(struct kgsl_devmemstore) + \ 109 offsetof(struct kgsl_devmemstore, field)) 110 111 /* timestamp id*/ 112 enum kgsl_timestamp_type { 113 KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */ 114 KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/ 115 KGSL_TIMESTAMP_QUEUED = 0x00000003, 116 }; 117 118 /* property types - used with kgsl_device_getproperty */ 119 enum kgsl_property_type { 120 KGSL_PROP_DEVICE_INFO = 0x00000001, 121 KGSL_PROP_DEVICE_SHADOW = 0x00000002, 122 KGSL_PROP_DEVICE_POWER = 0x00000003, 123 KGSL_PROP_SHMEM = 0x00000004, 124 KGSL_PROP_SHMEM_APERTURES = 0x00000005, 125 KGSL_PROP_MMU_ENABLE = 0x00000006, 126 KGSL_PROP_INTERRUPT_WAITS = 0x00000007, 127 KGSL_PROP_VERSION = 0x00000008, 128 KGSL_PROP_GPU_RESET_STAT = 0x00000009, 129 KGSL_PROP_PWRCTRL = 0x0000000E, 130 }; 131 132 struct kgsl_shadowprop { 133 unsigned int gpuaddr; 134 unsigned int size; 135 unsigned int flags; /* contains KGSL_FLAGS_ values */ 136 }; 137 138 struct kgsl_pwrlevel { 139 unsigned int gpu_freq; 140 unsigned int bus_freq; 141 unsigned int io_fraction; 142 }; 143 144 struct kgsl_version { 145 unsigned int drv_major; 146 unsigned int drv_minor; 147 unsigned int dev_major; 148 unsigned int dev_minor; 149 }; 150 151 #ifdef __KERNEL__ 152 153 #define KGSL_3D0_REG_MEMORY "kgsl_3d0_reg_memory" 154 #define KGSL_3D0_IRQ "kgsl_3d0_irq" 155 #define KGSL_2D0_REG_MEMORY "kgsl_2d0_reg_memory" 156 #define KGSL_2D0_IRQ "kgsl_2d0_irq" 157 #define KGSL_2D1_REG_MEMORY "kgsl_2d1_reg_memory" 158 #define KGSL_2D1_IRQ "kgsl_2d1_irq" 159 160 enum kgsl_iommu_context_id { 161 KGSL_IOMMU_CONTEXT_USER = 0, 162 KGSL_IOMMU_CONTEXT_PRIV = 1, 163 }; 164 165 struct kgsl_iommu_ctx { 166 const char *iommu_ctx_name; 167 enum kgsl_iommu_context_id ctx_id; 168 }; 169 170 struct kgsl_device_iommu_data { 171 const struct kgsl_iommu_ctx *iommu_ctxs; 172 int iommu_ctx_count; 173 unsigned int physstart; 174 unsigned int physend; 175 }; 176 177 struct kgsl_device_platform_data { 178 struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS]; 179 int init_level; 180 int num_levels; 181 int (*set_grp_async)(void); 182 unsigned int idle_timeout; 183 bool strtstp_sleepwake; 184 unsigned int nap_allowed; 185 unsigned int clk_map; 186 unsigned int idle_needed; 187 struct msm_bus_scale_pdata *bus_scale_table; 188 struct kgsl_device_iommu_data *iommu_data; 189 int iommu_count; 190 struct msm_dcvs_core_info *core_info; 191 }; 192 193 #endif 194 195 /* structure holds list of ibs */ 196 struct kgsl_ibdesc { 197 unsigned int gpuaddr; 198 void *hostptr; 199 unsigned int sizedwords; 200 unsigned int ctrl; 201 }; 202 203 /* ioctls */ 204 #define KGSL_IOC_TYPE 0x09 205 206 /* get misc info about the GPU 207 type should be a value from enum kgsl_property_type 208 value points to a structure that varies based on type 209 sizebytes is sizeof() that structure 210 for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo 211 this structure contaings hardware versioning info. 212 for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop 213 this is used to find mmap() offset and sizes for mapping 214 struct kgsl_memstore into userspace. 215 */ 216 struct kgsl_device_getproperty { 217 unsigned int type; 218 void *value; 219 unsigned int sizebytes; 220 }; 221 222 #define IOCTL_KGSL_DEVICE_GETPROPERTY \ 223 _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty) 224 225 /* IOCTL_KGSL_DEVICE_READ (0x3) - removed 03/2012 226 */ 227 228 /* block until the GPU has executed past a given timestamp 229 * timeout is in milliseconds. 230 */ 231 struct kgsl_device_waittimestamp { 232 unsigned int timestamp; 233 unsigned int timeout; 234 }; 235 236 #define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \ 237 _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp) 238 239 struct kgsl_device_waittimestamp_ctxtid { 240 unsigned int context_id; 241 unsigned int timestamp; 242 unsigned int timeout; 243 }; 244 245 #define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID \ 246 _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid) 247 248 /* issue indirect commands to the GPU. 249 * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE 250 * ibaddr and sizedwords must specify a subset of a buffer created 251 * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM 252 * flags may be a mask of KGSL_CONTEXT_ values 253 * timestamp is a returned counter value which can be passed to 254 * other ioctls to determine when the commands have been executed by 255 * the GPU. 256 */ 257 struct kgsl_ringbuffer_issueibcmds { 258 unsigned int drawctxt_id; 259 unsigned int ibdesc_addr; 260 unsigned int numibs; 261 unsigned int timestamp; /*output param */ 262 unsigned int flags; 263 }; 264 265 #define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \ 266 _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds) 267 268 /* read the most recently executed timestamp value 269 * type should be a value from enum kgsl_timestamp_type 270 */ 271 struct kgsl_cmdstream_readtimestamp { 272 unsigned int type; 273 unsigned int timestamp; /*output param */ 274 }; 275 276 #define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD \ 277 _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) 278 279 #define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \ 280 _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) 281 282 /* free memory when the GPU reaches a given timestamp. 283 * gpuaddr specify a memory region created by a 284 * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call 285 * type should be a value from enum kgsl_timestamp_type 286 */ 287 struct kgsl_cmdstream_freememontimestamp { 288 unsigned int gpuaddr; 289 unsigned int type; 290 unsigned int timestamp; 291 }; 292 293 #define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \ 294 _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) 295 296 /* Previous versions of this header had incorrectly defined 297 IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead 298 of a write only ioctl. To ensure binary compatability, the following 299 #define will be used to intercept the incorrect ioctl 300 */ 301 302 #define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD \ 303 _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) 304 305 /* create a draw context, which is used to preserve GPU state. 306 * The flags field may contain a mask KGSL_CONTEXT_* values 307 */ 308 struct kgsl_drawctxt_create { 309 unsigned int flags; 310 unsigned int drawctxt_id; /*output param */ 311 }; 312 313 #define IOCTL_KGSL_DRAWCTXT_CREATE \ 314 _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create) 315 316 /* destroy a draw context */ 317 struct kgsl_drawctxt_destroy { 318 unsigned int drawctxt_id; 319 }; 320 321 #define IOCTL_KGSL_DRAWCTXT_DESTROY \ 322 _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy) 323 324 /* add a block of pmem, fb, ashmem or user allocated address 325 * into the GPU address space */ 326 struct kgsl_map_user_mem { 327 int fd; 328 unsigned int gpuaddr; /*output param */ 329 unsigned int len; 330 unsigned int offset; 331 unsigned int hostptr; /*input param */ 332 enum kgsl_user_mem_type memtype; 333 unsigned int reserved; /* May be required to add 334 params for another mem type */ 335 }; 336 337 #define IOCTL_KGSL_MAP_USER_MEM \ 338 _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem) 339 340 struct kgsl_cmdstream_readtimestamp_ctxtid { 341 unsigned int context_id; 342 unsigned int type; 343 unsigned int timestamp; /*output param */ 344 }; 345 346 #define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID \ 347 _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid) 348 349 struct kgsl_cmdstream_freememontimestamp_ctxtid { 350 unsigned int context_id; 351 unsigned int gpuaddr; 352 unsigned int type; 353 unsigned int timestamp; 354 }; 355 356 #define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID \ 357 _IOW(KGSL_IOC_TYPE, 0x17, \ 358 struct kgsl_cmdstream_freememontimestamp_ctxtid) 359 360 /* add a block of pmem or fb into the GPU address space */ 361 struct kgsl_sharedmem_from_pmem { 362 int pmem_fd; 363 unsigned int gpuaddr; /*output param */ 364 unsigned int len; 365 unsigned int offset; 366 }; 367 368 #define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \ 369 _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem) 370 371 /* remove memory from the GPU's address space */ 372 struct kgsl_sharedmem_free { 373 unsigned int gpuaddr; 374 }; 375 376 #define IOCTL_KGSL_SHAREDMEM_FREE \ 377 _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free) 378 379 struct kgsl_cff_user_event { 380 unsigned char cff_opcode; 381 unsigned int op1; 382 unsigned int op2; 383 unsigned int op3; 384 unsigned int op4; 385 unsigned int op5; 386 unsigned int __pad[2]; 387 }; 388 389 #define IOCTL_KGSL_CFF_USER_EVENT \ 390 _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event) 391 392 struct kgsl_gmem_desc { 393 unsigned int x; 394 unsigned int y; 395 unsigned int width; 396 unsigned int height; 397 unsigned int pitch; 398 }; 399 400 struct kgsl_buffer_desc { 401 void *hostptr; 402 unsigned int gpuaddr; 403 int size; 404 unsigned int format; 405 unsigned int pitch; 406 unsigned int enabled; 407 }; 408 409 struct kgsl_bind_gmem_shadow { 410 unsigned int drawctxt_id; 411 struct kgsl_gmem_desc gmem_desc; 412 unsigned int shadow_x; 413 unsigned int shadow_y; 414 struct kgsl_buffer_desc shadow_buffer; 415 unsigned int buffer_id; 416 }; 417 418 #define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \ 419 _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow) 420 421 /* add a block of memory into the GPU address space */ 422 struct kgsl_sharedmem_from_vmalloc { 423 unsigned int gpuaddr; /*output param */ 424 unsigned int hostptr; 425 unsigned int flags; 426 }; 427 428 #define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \ 429 _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc) 430 431 #define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \ 432 _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free) 433 434 struct kgsl_drawctxt_set_bin_base_offset { 435 unsigned int drawctxt_id; 436 unsigned int offset; 437 }; 438 439 #define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \ 440 _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset) 441 442 enum kgsl_cmdwindow_type { 443 KGSL_CMDWINDOW_MIN = 0x00000000, 444 KGSL_CMDWINDOW_2D = 0x00000000, 445 KGSL_CMDWINDOW_3D = 0x00000001, /* legacy */ 446 KGSL_CMDWINDOW_MMU = 0x00000002, 447 KGSL_CMDWINDOW_ARBITER = 0x000000FF, 448 KGSL_CMDWINDOW_MAX = 0x000000FF, 449 }; 450 451 /* write to the command window */ 452 struct kgsl_cmdwindow_write { 453 enum kgsl_cmdwindow_type target; 454 unsigned int addr; 455 unsigned int data; 456 }; 457 458 #define IOCTL_KGSL_CMDWINDOW_WRITE \ 459 _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write) 460 461 struct kgsl_gpumem_alloc { 462 unsigned long gpuaddr; 463 size_t size; 464 unsigned int flags; 465 }; 466 467 #define IOCTL_KGSL_GPUMEM_ALLOC \ 468 _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc) 469 470 struct kgsl_cff_syncmem { 471 unsigned int gpuaddr; 472 unsigned int len; 473 unsigned int __pad[2]; /* For future binary compatibility */ 474 }; 475 476 #define IOCTL_KGSL_CFF_SYNCMEM \ 477 _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem) 478 479 /* 480 * A timestamp event allows the user space to register an action following an 481 * expired timestamp. 482 */ 483 484 struct kgsl_timestamp_event { 485 int type; /* Type of event (see list below) */ 486 unsigned int timestamp; /* Timestamp to trigger event on */ 487 unsigned int context_id; /* Context for the timestamp */ 488 void *priv; /* Pointer to the event specific blob */ 489 size_t len; /* Size of the event specific blob */ 490 }; 491 492 #define IOCTL_KGSL_TIMESTAMP_EVENT \ 493 _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event) 494 495 /* A genlock timestamp event releases an existing lock on timestamp expire */ 496 497 #define KGSL_TIMESTAMP_EVENT_GENLOCK 1 498 499 struct kgsl_timestamp_event_genlock { 500 int handle; /* Handle of the genlock lock to release */ 501 }; 502 503 /* 504 * Set a property within the kernel. Uses the same structure as 505 * IOCTL_KGSL_GETPROPERTY 506 */ 507 508 #define IOCTL_KGSL_SETPROPERTY \ 509 _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty) 510 511 #ifdef __KERNEL__ 512 #ifdef CONFIG_MSM_KGSL_DRM 513 int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start, 514 unsigned long *len); 515 #else 516 #define kgsl_gem_obj_addr(...) 0 517 #endif 518 #endif 519 #endif /* _MSM_KGSL_H */ 520
