1 /* 2 * Copyright (c) 2007 Dave Airlie <airlied (at) linux.ie> 3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker (at) gmail.com> 4 * Copyright (c) 2008 Red Hat Inc. 5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6 * Copyright (c) 2007-2008 Intel Corporation 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24 * IN THE SOFTWARE. 25 */ 26 27 #ifndef _DRM_MODE_H 28 #define _DRM_MODE_H 29 30 #define DRM_DISPLAY_INFO_LEN 32 31 #define DRM_CONNECTOR_NAME_LEN 32 32 #define DRM_DISPLAY_MODE_LEN 32 33 #define DRM_PROP_NAME_LEN 32 34 35 #define DRM_MODE_TYPE_BUILTIN (1<<0) 36 #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 37 #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 38 #define DRM_MODE_TYPE_PREFERRED (1<<3) 39 #define DRM_MODE_TYPE_DEFAULT (1<<4) 40 #define DRM_MODE_TYPE_USERDEF (1<<5) 41 #define DRM_MODE_TYPE_DRIVER (1<<6) 42 43 /* Video mode flags */ 44 /* bit compatible with the xorg definitions. */ 45 #define DRM_MODE_FLAG_PHSYNC (1<<0) 46 #define DRM_MODE_FLAG_NHSYNC (1<<1) 47 #define DRM_MODE_FLAG_PVSYNC (1<<2) 48 #define DRM_MODE_FLAG_NVSYNC (1<<3) 49 #define DRM_MODE_FLAG_INTERLACE (1<<4) 50 #define DRM_MODE_FLAG_DBLSCAN (1<<5) 51 #define DRM_MODE_FLAG_CSYNC (1<<6) 52 #define DRM_MODE_FLAG_PCSYNC (1<<7) 53 #define DRM_MODE_FLAG_NCSYNC (1<<8) 54 #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ 55 #define DRM_MODE_FLAG_BCAST (1<<10) 56 #define DRM_MODE_FLAG_PIXMUX (1<<11) 57 #define DRM_MODE_FLAG_DBLCLK (1<<12) 58 #define DRM_MODE_FLAG_CLKDIV2 (1<<13) 59 #define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 60 #define DRM_MODE_FLAG_3D_NONE (0<<14) 61 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 62 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 63 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 64 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 65 #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 66 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 67 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 68 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 69 70 71 /* DPMS flags */ 72 /* bit compatible with the xorg definitions. */ 73 #define DRM_MODE_DPMS_ON 0 74 #define DRM_MODE_DPMS_STANDBY 1 75 #define DRM_MODE_DPMS_SUSPEND 2 76 #define DRM_MODE_DPMS_OFF 3 77 78 /* Scaling mode options */ 79 #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or 80 software can still scale) */ 81 #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ 82 #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ 83 #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ 84 85 /* Dithering mode options */ 86 #define DRM_MODE_DITHERING_OFF 0 87 #define DRM_MODE_DITHERING_ON 1 88 #define DRM_MODE_DITHERING_AUTO 2 89 90 /* Dirty info options */ 91 #define DRM_MODE_DIRTY_OFF 0 92 #define DRM_MODE_DIRTY_ON 1 93 #define DRM_MODE_DIRTY_ANNOTATE 2 94 95 struct drm_mode_modeinfo { 96 __u32 clock; 97 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 98 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 99 100 __u32 vrefresh; 101 102 __u32 flags; 103 __u32 type; 104 char name[DRM_DISPLAY_MODE_LEN]; 105 }; 106 107 struct drm_mode_card_res { 108 __u64 fb_id_ptr; 109 __u64 crtc_id_ptr; 110 __u64 connector_id_ptr; 111 __u64 encoder_id_ptr; 112 __u32 count_fbs; 113 __u32 count_crtcs; 114 __u32 count_connectors; 115 __u32 count_encoders; 116 __u32 min_width, max_width; 117 __u32 min_height, max_height; 118 }; 119 120 struct drm_mode_crtc { 121 __u64 set_connectors_ptr; 122 __u32 count_connectors; 123 124 __u32 crtc_id; /**< Id */ 125 __u32 fb_id; /**< Id of framebuffer */ 126 127 __u32 x, y; /**< Position on the frameuffer */ 128 129 __u32 gamma_size; 130 __u32 mode_valid; 131 struct drm_mode_modeinfo mode; 132 }; 133 134 #define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 135 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 136 137 /* Planes blend with or override other bits on the CRTC */ 138 struct drm_mode_set_plane { 139 __u32 plane_id; 140 __u32 crtc_id; 141 __u32 fb_id; /* fb object contains surface format type */ 142 __u32 flags; 143 144 /* Signed dest location allows it to be partially off screen */ 145 __s32 crtc_x, crtc_y; 146 __u32 crtc_w, crtc_h; 147 148 /* Source values are 16.16 fixed point */ 149 __u32 src_x, src_y; 150 __u32 src_h, src_w; 151 }; 152 153 struct drm_mode_get_plane { 154 __u32 plane_id; 155 156 __u32 crtc_id; 157 __u32 fb_id; 158 159 __u32 possible_crtcs; 160 __u32 gamma_size; 161 162 __u32 count_format_types; 163 __u64 format_type_ptr; 164 }; 165 166 struct drm_mode_get_plane_res { 167 __u64 plane_id_ptr; 168 __u32 count_planes; 169 }; 170 171 #define DRM_MODE_ENCODER_NONE 0 172 #define DRM_MODE_ENCODER_DAC 1 173 #define DRM_MODE_ENCODER_TMDS 2 174 #define DRM_MODE_ENCODER_LVDS 3 175 #define DRM_MODE_ENCODER_TVDAC 4 176 #define DRM_MODE_ENCODER_VIRTUAL 5 177 #define DRM_MODE_ENCODER_DSI 6 178 #define DRM_MODE_ENCODER_DPMST 7 179 180 struct drm_mode_get_encoder { 181 __u32 encoder_id; 182 __u32 encoder_type; 183 184 __u32 crtc_id; /**< Id of crtc */ 185 186 __u32 possible_crtcs; 187 __u32 possible_clones; 188 }; 189 190 /* This is for connectors with multiple signal types. */ 191 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ 192 #define DRM_MODE_SUBCONNECTOR_Automatic 0 193 #define DRM_MODE_SUBCONNECTOR_Unknown 0 194 #define DRM_MODE_SUBCONNECTOR_DVID 3 195 #define DRM_MODE_SUBCONNECTOR_DVIA 4 196 #define DRM_MODE_SUBCONNECTOR_Composite 5 197 #define DRM_MODE_SUBCONNECTOR_SVIDEO 6 198 #define DRM_MODE_SUBCONNECTOR_Component 8 199 #define DRM_MODE_SUBCONNECTOR_SCART 9 200 201 #define DRM_MODE_CONNECTOR_Unknown 0 202 #define DRM_MODE_CONNECTOR_VGA 1 203 #define DRM_MODE_CONNECTOR_DVII 2 204 #define DRM_MODE_CONNECTOR_DVID 3 205 #define DRM_MODE_CONNECTOR_DVIA 4 206 #define DRM_MODE_CONNECTOR_Composite 5 207 #define DRM_MODE_CONNECTOR_SVIDEO 6 208 #define DRM_MODE_CONNECTOR_LVDS 7 209 #define DRM_MODE_CONNECTOR_Component 8 210 #define DRM_MODE_CONNECTOR_9PinDIN 9 211 #define DRM_MODE_CONNECTOR_DisplayPort 10 212 #define DRM_MODE_CONNECTOR_HDMIA 11 213 #define DRM_MODE_CONNECTOR_HDMIB 12 214 #define DRM_MODE_CONNECTOR_TV 13 215 #define DRM_MODE_CONNECTOR_eDP 14 216 #define DRM_MODE_CONNECTOR_VIRTUAL 15 217 #define DRM_MODE_CONNECTOR_DSI 16 218 219 struct drm_mode_get_connector { 220 221 __u64 encoders_ptr; 222 __u64 modes_ptr; 223 __u64 props_ptr; 224 __u64 prop_values_ptr; 225 226 __u32 count_modes; 227 __u32 count_props; 228 __u32 count_encoders; 229 230 __u32 encoder_id; /**< Current Encoder */ 231 __u32 connector_id; /**< Id */ 232 __u32 connector_type; 233 __u32 connector_type_id; 234 235 __u32 connection; 236 __u32 mm_width, mm_height; /**< HxW in millimeters */ 237 __u32 subpixel; 238 }; 239 240 #define DRM_MODE_PROP_PENDING (1<<0) 241 #define DRM_MODE_PROP_RANGE (1<<1) 242 #define DRM_MODE_PROP_IMMUTABLE (1<<2) 243 #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ 244 #define DRM_MODE_PROP_BLOB (1<<4) 245 #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ 246 247 /* non-extended types: legacy bitmask, one bit per type: */ 248 #define DRM_MODE_PROP_LEGACY_TYPE ( \ 249 DRM_MODE_PROP_RANGE | \ 250 DRM_MODE_PROP_ENUM | \ 251 DRM_MODE_PROP_BLOB | \ 252 DRM_MODE_PROP_BITMASK) 253 254 /* extended-types: rather than continue to consume a bit per type, 255 * grab a chunk of the bits to use as integer type id. 256 */ 257 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 258 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 259 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 260 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 261 262 /* the PROP_ATOMIC flag is used to hide properties from userspace that 263 * is not aware of atomic properties. This is mostly to work around 264 * older userspace (DDX drivers) that read/write each prop they find, 265 * witout being aware that this could be triggering a lengthy modeset. 266 */ 267 #define DRM_MODE_PROP_ATOMIC 0x80000000 268 269 struct drm_mode_property_enum { 270 __u64 value; 271 char name[DRM_PROP_NAME_LEN]; 272 }; 273 274 struct drm_mode_get_property { 275 __u64 values_ptr; /* values and blob lengths */ 276 __u64 enum_blob_ptr; /* enum and blob id ptrs */ 277 278 __u32 prop_id; 279 __u32 flags; 280 char name[DRM_PROP_NAME_LEN]; 281 282 __u32 count_values; 283 __u32 count_enum_blobs; 284 }; 285 286 struct drm_mode_connector_set_property { 287 __u64 value; 288 __u32 prop_id; 289 __u32 connector_id; 290 }; 291 292 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 293 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 294 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 295 #define DRM_MODE_OBJECT_MODE 0xdededede 296 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 297 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 298 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 299 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 300 301 struct drm_mode_obj_get_properties { 302 __u64 props_ptr; 303 __u64 prop_values_ptr; 304 __u32 count_props; 305 __u32 obj_id; 306 __u32 obj_type; 307 }; 308 309 struct drm_mode_obj_set_property { 310 __u64 value; 311 __u32 prop_id; 312 __u32 obj_id; 313 __u32 obj_type; 314 }; 315 316 struct drm_mode_get_blob { 317 __u32 blob_id; 318 __u32 length; 319 __u64 data; 320 }; 321 322 struct drm_mode_fb_cmd { 323 __u32 fb_id; 324 __u32 width, height; 325 __u32 pitch; 326 __u32 bpp; 327 __u32 depth; 328 /* driver specific handle */ 329 __u32 handle; 330 }; 331 332 #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ 333 334 struct drm_mode_fb_cmd2 { 335 __u32 fb_id; 336 __u32 width, height; 337 __u32 pixel_format; /* fourcc code from drm_fourcc.h */ 338 __u32 flags; 339 340 /* 341 * In case of planar formats, this ioctl allows up to 4 342 * buffer objects with offsets and pitches per plane. 343 * The pitch and offset order is dictated by the fourcc, 344 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: 345 * 346 * YUV 4:2:0 image with a plane of 8 bit Y samples 347 * followed by an interleaved U/V plane containing 348 * 8 bit 2x2 subsampled colour difference samples. 349 * 350 * So it would consist of Y as offset[0] and UV as 351 * offset[1]. Note that offset[0] will generally 352 * be 0. 353 */ 354 __u32 handles[4]; 355 __u32 pitches[4]; /* pitch for each plane */ 356 __u32 offsets[4]; /* offset of each plane */ 357 }; 358 359 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 360 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 361 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 362 363 /* 364 * Mark a region of a framebuffer as dirty. 365 * 366 * Some hardware does not automatically update display contents 367 * as a hardware or software draw to a framebuffer. This ioctl 368 * allows userspace to tell the kernel and the hardware what 369 * regions of the framebuffer have changed. 370 * 371 * The kernel or hardware is free to update more then just the 372 * region specified by the clip rects. The kernel or hardware 373 * may also delay and/or coalesce several calls to dirty into a 374 * single update. 375 * 376 * Userspace may annotate the updates, the annotates are a 377 * promise made by the caller that the change is either a copy 378 * of pixels or a fill of a single color in the region specified. 379 * 380 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then 381 * the number of updated regions are half of num_clips given, 382 * where the clip rects are paired in src and dst. The width and 383 * height of each one of the pairs must match. 384 * 385 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller 386 * promises that the region specified of the clip rects is filled 387 * completely with a single color as given in the color argument. 388 */ 389 390 struct drm_mode_fb_dirty_cmd { 391 __u32 fb_id; 392 __u32 flags; 393 __u32 color; 394 __u32 num_clips; 395 __u64 clips_ptr; 396 }; 397 398 struct drm_mode_mode_cmd { 399 __u32 connector_id; 400 struct drm_mode_modeinfo mode; 401 }; 402 403 #define DRM_MODE_CURSOR_BO (1<<0) 404 #define DRM_MODE_CURSOR_MOVE (1<<1) 405 406 /* 407 * depending on the value in flags diffrent members are used. 408 * 409 * CURSOR_BO uses 410 * crtc 411 * width 412 * height 413 * handle - if 0 turns the cursor of 414 * 415 * CURSOR_MOVE uses 416 * crtc 417 * x 418 * y 419 */ 420 struct drm_mode_cursor { 421 __u32 flags; 422 __u32 crtc_id; 423 __s32 x; 424 __s32 y; 425 __u32 width; 426 __u32 height; 427 /* driver specific handle */ 428 __u32 handle; 429 }; 430 431 struct drm_mode_cursor2 { 432 __u32 flags; 433 __u32 crtc_id; 434 __s32 x; 435 __s32 y; 436 __u32 width; 437 __u32 height; 438 /* driver specific handle */ 439 __u32 handle; 440 __s32 hot_x; 441 __s32 hot_y; 442 }; 443 444 struct drm_mode_crtc_lut { 445 __u32 crtc_id; 446 __u32 gamma_size; 447 448 /* pointers to arrays */ 449 __u64 red; 450 __u64 green; 451 __u64 blue; 452 }; 453 454 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 455 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 456 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC) 457 458 /* 459 * Request a page flip on the specified crtc. 460 * 461 * This ioctl will ask KMS to schedule a page flip for the specified 462 * crtc. Once any pending rendering targeting the specified fb (as of 463 * ioctl time) has completed, the crtc will be reprogrammed to display 464 * that fb after the next vertical refresh. The ioctl returns 465 * immediately, but subsequent rendering to the current fb will block 466 * in the execbuffer ioctl until the page flip happens. If a page 467 * flip is already pending as the ioctl is called, EBUSY will be 468 * returned. 469 * 470 * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will 471 * request that drm sends back a vblank event (see drm.h: struct 472 * drm_event_vblank) when the page flip is done. The user_data field 473 * passed in with this ioctl will be returned as the user_data field 474 * in the vblank event struct. 475 * 476 * The reserved field must be zero until we figure out something 477 * clever to use it for. 478 */ 479 480 struct drm_mode_crtc_page_flip { 481 __u32 crtc_id; 482 __u32 fb_id; 483 __u32 flags; 484 __u32 reserved; 485 __u64 user_data; 486 }; 487 488 /* create a dumb scanout buffer */ 489 struct drm_mode_create_dumb { 490 __u32 height; 491 __u32 width; 492 __u32 bpp; 493 __u32 flags; 494 /* handle, pitch, size will be returned */ 495 __u32 handle; 496 __u32 pitch; 497 __u64 size; 498 }; 499 500 /* set up for mmap of a dumb scanout buffer */ 501 struct drm_mode_map_dumb { 502 /** Handle for the object being mapped. */ 503 __u32 handle; 504 __u32 pad; 505 /** 506 * Fake offset to use for subsequent mmap call 507 * 508 * This is a fixed-size type for 32/64 compatibility. 509 */ 510 __u64 offset; 511 }; 512 513 struct drm_mode_destroy_dumb { 514 __u32 handle; 515 }; 516 517 /* page-flip flags are valid, plus: */ 518 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 519 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 520 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 521 522 #define DRM_MODE_ATOMIC_FLAGS (\ 523 DRM_MODE_PAGE_FLIP_EVENT |\ 524 DRM_MODE_PAGE_FLIP_ASYNC |\ 525 DRM_MODE_ATOMIC_TEST_ONLY |\ 526 DRM_MODE_ATOMIC_NONBLOCK |\ 527 DRM_MODE_ATOMIC_ALLOW_MODESET) 528 529 struct drm_mode_atomic { 530 __u32 flags; 531 __u32 count_objs; 532 __u64 objs_ptr; 533 __u64 count_props_ptr; 534 __u64 props_ptr; 535 __u64 prop_values_ptr; 536 __u64 reserved; 537 __u64 user_data; 538 }; 539 540 /** 541 * Create a new 'blob' data property, copying length bytes from data pointer, 542 * and returning new blob ID. 543 */ 544 struct drm_mode_create_blob { 545 /** Pointer to data to copy. */ 546 __u64 data; 547 /** Length of data to copy. */ 548 __u32 length; 549 /** Return: new property ID. */ 550 __u32 blob_id; 551 }; 552 553 /** 554 * Destroy a user-created blob property. 555 */ 556 struct drm_mode_destroy_blob { 557 __u32 blob_id; 558 }; 559 560 #endif 561
