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      1 //===- HexagonOperands.td - Hexagon immediate processing -*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illnois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 
     10 // Immediate operands.
     11 
     12 let PrintMethod = "printImmOperand" in {
     13   // f32Ext type is used to identify constant extended floating point immediates.
     14   def f32Ext : Operand<f32>;
     15   def s32Imm : Operand<i32>;
     16   def s26_6Imm : Operand<i32>;
     17   def s16Imm : Operand<i32>;
     18   def s12Imm : Operand<i32>;
     19   def s11Imm : Operand<i32>;
     20   def s11_0Imm : Operand<i32>;
     21   def s11_1Imm : Operand<i32>;
     22   def s11_2Imm : Operand<i32>;
     23   def s11_3Imm : Operand<i32>;
     24   def s10Imm : Operand<i32>;
     25   def s9Imm : Operand<i32>;
     26   def m9Imm : Operand<i32>;
     27   def s8Imm : Operand<i32>;
     28   def s8Imm64 : Operand<i64>;
     29   def s6Imm : Operand<i32>;
     30   def s4Imm : Operand<i32>;
     31   def s4_0Imm : Operand<i32>;
     32   def s4_1Imm : Operand<i32>;
     33   def s4_2Imm : Operand<i32>;
     34   def s4_3Imm : Operand<i32>;
     35   def u64Imm : Operand<i64>;
     36   def u32Imm : Operand<i32>;
     37   def u26_6Imm : Operand<i32>;
     38   def u16Imm : Operand<i32>;
     39   def u16_0Imm : Operand<i32>;
     40   def u16_1Imm : Operand<i32>;
     41   def u16_2Imm : Operand<i32>;
     42   def u16_3Imm : Operand<i32>;
     43   def u11_3Imm : Operand<i32>;
     44   def u10Imm : Operand<i32>;
     45   def u9Imm : Operand<i32>;
     46   def u8Imm : Operand<i32>;
     47   def u7Imm : Operand<i32>;
     48   def u6Imm : Operand<i32>;
     49   def u6_0Imm : Operand<i32>;
     50   def u6_1Imm : Operand<i32>;
     51   def u6_2Imm : Operand<i32>;
     52   def u6_3Imm : Operand<i32>;
     53   def u5Imm : Operand<i32>;
     54   def u4Imm : Operand<i32>;
     55   def u3Imm : Operand<i32>;
     56   def u2Imm : Operand<i32>;
     57   def u1Imm : Operand<i32>;
     58   def n8Imm : Operand<i32>;
     59   def m6Imm : Operand<i32>;
     60 }
     61 
     62 let PrintMethod = "printNOneImmOperand" in
     63 def nOneImm : Operand<i32>;
     64 
     65 //
     66 // Immediate predicates
     67 //
     68 def s32ImmPred  : PatLeaf<(i32 imm), [{
     69   int64_t v = (int64_t)N->getSExtValue();
     70   return isInt<32>(v);
     71 }]>;
     72 
     73 def s32_0ImmPred  : PatLeaf<(i32 imm), [{
     74   int64_t v = (int64_t)N->getSExtValue();
     75   return isInt<32>(v);
     76 }]>;
     77 
     78 def s31_1ImmPred  : PatLeaf<(i32 imm), [{
     79   int64_t v = (int64_t)N->getSExtValue();
     80   return isShiftedInt<31,1>(v);
     81 }]>;
     82 
     83 def s30_2ImmPred  : PatLeaf<(i32 imm), [{
     84   int64_t v = (int64_t)N->getSExtValue();
     85   return isShiftedInt<31,1>(v);
     86 }]>;
     87 
     88 def s29_3ImmPred  : PatLeaf<(i32 imm), [{
     89   int64_t v = (int64_t)N->getSExtValue();
     90   return isShiftedInt<31,1>(v);
     91 }]>;
     92 
     93 def s22_10ImmPred  : PatLeaf<(i32 imm), [{
     94   int64_t v = (int64_t)N->getSExtValue();
     95   return isShiftedInt<22,10>(v);
     96 }]>;
     97 
     98 def s8_24ImmPred  : PatLeaf<(i32 imm), [{
     99   int64_t v = (int64_t)N->getSExtValue();
    100   return isShiftedInt<8,24>(v);
    101 }]>;
    102 
    103 def s16_16ImmPred  : PatLeaf<(i32 imm), [{
    104   int64_t v = (int64_t)N->getSExtValue();
    105   return isShiftedInt<16,16>(v);
    106 }]>;
    107 
    108 def s26_6ImmPred  : PatLeaf<(i32 imm), [{
    109   int64_t v = (int64_t)N->getSExtValue();
    110   return isShiftedInt<26,6>(v);
    111 }]>;
    112 
    113 def s16ImmPred  : PatLeaf<(i32 imm), [{
    114   int64_t v = (int64_t)N->getSExtValue();
    115   return isInt<16>(v);
    116 }]>;
    117 
    118 def s13ImmPred  : PatLeaf<(i32 imm), [{
    119   int64_t v = (int64_t)N->getSExtValue();
    120   return isInt<13>(v);
    121 }]>;
    122 
    123 def s12ImmPred  : PatLeaf<(i32 imm), [{
    124   int64_t v = (int64_t)N->getSExtValue();
    125   return isInt<12>(v);
    126 }]>;
    127 
    128 def s11_0ImmPred  : PatLeaf<(i32 imm), [{
    129   int64_t v = (int64_t)N->getSExtValue();
    130   return isInt<11>(v);
    131 }]>;
    132 
    133 def s11_1ImmPred  : PatLeaf<(i32 imm), [{
    134   int64_t v = (int64_t)N->getSExtValue();
    135   return isShiftedInt<11,1>(v);
    136 }]>;
    137 
    138 def s11_2ImmPred  : PatLeaf<(i32 imm), [{
    139   int64_t v = (int64_t)N->getSExtValue();
    140   return isShiftedInt<11,2>(v);
    141 }]>;
    142 
    143 def s11_3ImmPred  : PatLeaf<(i32 imm), [{
    144   int64_t v = (int64_t)N->getSExtValue();
    145   return isShiftedInt<11,3>(v);
    146 }]>;
    147 
    148 def s10ImmPred  : PatLeaf<(i32 imm), [{
    149   int64_t v = (int64_t)N->getSExtValue();
    150   return isInt<10>(v);
    151 }]>;
    152 
    153 def s9ImmPred  : PatLeaf<(i32 imm), [{
    154   int64_t v = (int64_t)N->getSExtValue();
    155   return isInt<9>(v);
    156 }]>;
    157 
    158 def m9ImmPred  : PatLeaf<(i32 imm), [{
    159   int64_t v = (int64_t)N->getSExtValue();
    160   return isInt<9>(v) && (v != -256);
    161 }]>;
    162 
    163 def s8ImmPred  : PatLeaf<(i32 imm), [{
    164   int64_t v = (int64_t)N->getSExtValue();
    165   return isInt<8>(v);
    166 }]>;
    167 
    168 def s8Imm64Pred  : PatLeaf<(i64 imm), [{
    169   int64_t v = (int64_t)N->getSExtValue();
    170   return isInt<8>(v);
    171 }]>;
    172 
    173 def s6ImmPred  : PatLeaf<(i32 imm), [{
    174   int64_t v = (int64_t)N->getSExtValue();
    175   return isInt<6>(v);
    176 }]>;
    177 
    178 def s4_0ImmPred  : PatLeaf<(i32 imm), [{
    179   int64_t v = (int64_t)N->getSExtValue();
    180   return isInt<4>(v);
    181 }]>;
    182 
    183 def s4_1ImmPred  : PatLeaf<(i32 imm), [{
    184   int64_t v = (int64_t)N->getSExtValue();
    185   return isShiftedInt<4,1>(v);
    186 }]>;
    187 
    188 def s4_2ImmPred  : PatLeaf<(i32 imm), [{
    189   int64_t v = (int64_t)N->getSExtValue();
    190   return isShiftedInt<4,2>(v);
    191 }]>;
    192 
    193 def s4_3ImmPred  : PatLeaf<(i32 imm), [{
    194   int64_t v = (int64_t)N->getSExtValue();
    195   return isShiftedInt<4,3>(v);
    196 }]>;
    197 
    198 
    199 def u64ImmPred  : PatLeaf<(i64 imm), [{
    200   // Adding "N ||" to suppress gcc unused warning.
    201   return (N || true);
    202 }]>;
    203 
    204 def u32ImmPred  : PatLeaf<(i32 imm), [{
    205   int64_t v = (int64_t)N->getSExtValue();
    206   return isUInt<32>(v);
    207 }]>;
    208 
    209 def u32_0ImmPred  : PatLeaf<(i32 imm), [{
    210   int64_t v = (int64_t)N->getSExtValue();
    211   return isUInt<32>(v);
    212 }]>;
    213 
    214 def u31_1ImmPred  : PatLeaf<(i32 imm), [{
    215   int64_t v = (int64_t)N->getSExtValue();
    216   return isShiftedUInt<31,1>(v);
    217 }]>;
    218 
    219 def u30_2ImmPred  : PatLeaf<(i32 imm), [{
    220   int64_t v = (int64_t)N->getSExtValue();
    221   return isShiftedUInt<30,2>(v);
    222 }]>;
    223 
    224 def u29_3ImmPred  : PatLeaf<(i32 imm), [{
    225   int64_t v = (int64_t)N->getSExtValue();
    226   return isShiftedUInt<29,3>(v);
    227 }]>;
    228 
    229 def u26_6ImmPred  : PatLeaf<(i32 imm), [{
    230   int64_t v = (int64_t)N->getSExtValue();
    231   return isShiftedUInt<26,6>(v);
    232 }]>;
    233 
    234 def u16ImmPred  : PatLeaf<(i32 imm), [{
    235   int64_t v = (int64_t)N->getSExtValue();
    236   return isUInt<16>(v);
    237 }]>;
    238 
    239 def u16_s8ImmPred  : PatLeaf<(i32 imm), [{
    240   int64_t v = (int64_t)N->getSExtValue();
    241   return isShiftedUInt<16,8>(v);
    242 }]>;
    243 
    244 def u16_0ImmPred  : PatLeaf<(i32 imm), [{
    245   int64_t v = (int64_t)N->getSExtValue();
    246   return isUInt<16>(v);
    247 }]>;
    248 
    249 def u11_3ImmPred : PatLeaf<(i32 imm), [{
    250   int64_t v = (int64_t)N->getSExtValue();
    251   return isShiftedUInt<11,3>(v);
    252 }]>;
    253 
    254 def u9ImmPred  : PatLeaf<(i32 imm), [{
    255   int64_t v = (int64_t)N->getSExtValue();
    256   return isUInt<9>(v);
    257 }]>;
    258 
    259 def u8ImmPred  : PatLeaf<(i32 imm), [{
    260   int64_t v = (int64_t)N->getSExtValue();
    261   return isUInt<8>(v);
    262 }]>;
    263 
    264 def u7StrictPosImmPred : ImmLeaf<i32, [{
    265   // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit
    266   // unsigned field and is strictly greater than 0.
    267   return isUInt<7>(Imm) && Imm > 0;
    268 }]>;
    269 
    270 def u7ImmPred  : PatLeaf<(i32 imm), [{
    271   int64_t v = (int64_t)N->getSExtValue();
    272   return isUInt<7>(v);
    273 }]>;
    274 
    275 def u6ImmPred  : PatLeaf<(i32 imm), [{
    276   int64_t v = (int64_t)N->getSExtValue();
    277   return isUInt<6>(v);
    278 }]>;
    279 
    280 def u6_0ImmPred  : PatLeaf<(i32 imm), [{
    281   int64_t v = (int64_t)N->getSExtValue();
    282   return isUInt<6>(v);
    283 }]>;
    284 
    285 def u6_1ImmPred  : PatLeaf<(i32 imm), [{
    286   int64_t v = (int64_t)N->getSExtValue();
    287   return isShiftedUInt<6,1>(v);
    288 }]>;
    289 
    290 def u6_2ImmPred  : PatLeaf<(i32 imm), [{
    291   int64_t v = (int64_t)N->getSExtValue();
    292   return isShiftedUInt<6,2>(v);
    293 }]>;
    294 
    295 def u6_3ImmPred  : PatLeaf<(i32 imm), [{
    296   int64_t v = (int64_t)N->getSExtValue();
    297   return isShiftedUInt<6,3>(v);
    298 }]>;
    299 
    300 def u5ImmPred  : PatLeaf<(i32 imm), [{
    301   int64_t v = (int64_t)N->getSExtValue();
    302   return isUInt<5>(v);
    303 }]>;
    304 
    305 def u4ImmPred  : PatLeaf<(i32 imm), [{
    306   int64_t v = (int64_t)N->getSExtValue();
    307   return isUInt<4>(v);
    308 }]>;
    309 
    310 def u3ImmPred  : PatLeaf<(i32 imm), [{
    311   int64_t v = (int64_t)N->getSExtValue();
    312   return isUInt<3>(v);
    313 }]>;
    314 
    315 def u2ImmPred  : PatLeaf<(i32 imm), [{
    316   int64_t v = (int64_t)N->getSExtValue();
    317   return isUInt<2>(v);
    318 }]>;
    319 
    320 def u1ImmPred  : PatLeaf<(i1 imm), [{
    321   int64_t v = (int64_t)N->getSExtValue();
    322   return isUInt<1>(v);
    323 }]>;
    324 
    325 def m5BImmPred  : PatLeaf<(i32 imm), [{
    326   // m5BImmPred predicate - True if the (char) number is in range -1 .. -31
    327   // and will fit in a 5 bit field when made positive, for use in memops.
    328   // this is specific to the zero extending of a negative by CombineInstr
    329   int8_t v = (int8_t)N->getSExtValue();
    330   return (-31 <= v && v <= -1);
    331 }]>;
    332 
    333 def m5HImmPred  : PatLeaf<(i32 imm), [{
    334   // m5HImmPred predicate - True if the (short) number is in range -1 .. -31
    335   // and will fit in a 5 bit field when made positive, for use in memops.
    336   // this is specific to the zero extending of a negative by CombineInstr
    337   int16_t v = (int16_t)N->getSExtValue();
    338   return (-31 <= v && v <= -1);
    339 }]>;
    340 
    341 def m5ImmPred  : PatLeaf<(i32 imm), [{
    342   // m5ImmPred predicate - True if the number is in range -1 .. -31
    343   // and will fit in a 5 bit field when made positive, for use in memops.
    344   int64_t v = (int64_t)N->getSExtValue();
    345   return (-31 <= v && v <= -1);
    346 }]>;
    347 
    348 //InN means negative integers in [-(2^N - 1), 0]
    349 def n8ImmPred  : PatLeaf<(i32 imm), [{
    350   // n8ImmPred predicate - True if the immediate fits in a 8-bit signed
    351   // field.
    352   int64_t v = (int64_t)N->getSExtValue();
    353   return (-255 <= v && v <= 0);
    354 }]>;
    355 
    356 def nOneImmPred  : PatLeaf<(i32 imm), [{
    357   // nOneImmPred predicate - True if the immediate is -1.
    358   int64_t v = (int64_t)N->getSExtValue();
    359   return (-1 == v);
    360 }]>;
    361 
    362 def Set5ImmPred : PatLeaf<(i32 imm), [{
    363   // Set5ImmPred predicate - True if the number is in the series of values.
    364   // [ 2^0, 2^1, ... 2^31 ]
    365   // For use in setbit immediate.
    366   uint32_t v = (int32_t)N->getSExtValue();
    367   // Constrain to 32 bits, and then check for single bit.
    368   return ImmIsSingleBit(v);
    369 }]>;
    370 
    371 def Clr5ImmPred : PatLeaf<(i32 imm), [{
    372   // Clr5ImmPred predicate - True if the number is in the series of
    373   // bit negated values.
    374   // [ 2^0, 2^1, ... 2^31 ]
    375   // For use in clrbit immediate.
    376   // Note: we are bit NOTing the value.
    377   uint32_t v = ~ (int32_t)N->getSExtValue();
    378   // Constrain to 32 bits, and then check for single bit.
    379   return ImmIsSingleBit(v);
    380 }]>;
    381 
    382 def SetClr5ImmPred : PatLeaf<(i32 imm), [{
    383   // SetClr5ImmPred predicate - True if the immediate is in range 0..31.
    384   int32_t v = (int32_t)N->getSExtValue();
    385   return (v >= 0 && v <= 31);
    386 }]>;
    387 
    388 def Set4ImmPred : PatLeaf<(i32 imm), [{
    389   // Set4ImmPred predicate - True if the number is in the series of values:
    390   // [ 2^0, 2^1, ... 2^15 ].
    391   // For use in setbit immediate.
    392   uint16_t v = (int16_t)N->getSExtValue();
    393   // Constrain to 16 bits, and then check for single bit.
    394   return ImmIsSingleBit(v);
    395 }]>;
    396 
    397 def Clr4ImmPred : PatLeaf<(i32 imm), [{
    398   // Clr4ImmPred predicate - True if the number is in the series of
    399   // bit negated values:
    400   // [ 2^0, 2^1, ... 2^15 ].
    401   // For use in setbit and clrbit immediate.
    402   uint16_t v = ~ (int16_t)N->getSExtValue();
    403   // Constrain to 16 bits, and then check for single bit.
    404   return ImmIsSingleBit(v);
    405 }]>;
    406 
    407 def SetClr4ImmPred : PatLeaf<(i32 imm), [{
    408   // SetClr4ImmPred predicate - True if the immediate is in the range 0..15.
    409   int16_t v = (int16_t)N->getSExtValue();
    410   return (v >= 0 && v <= 15);
    411 }]>;
    412 
    413 def Set3ImmPred : PatLeaf<(i32 imm), [{
    414   // Set3ImmPred predicate - True if the number is in the series of values:
    415   // [ 2^0, 2^1, ... 2^7 ].
    416   // For use in setbit immediate.
    417   uint8_t v = (int8_t)N->getSExtValue();
    418   // Constrain to 8 bits, and then check for single bit.
    419   return ImmIsSingleBit(v);
    420 }]>;
    421 
    422 def Clr3ImmPred : PatLeaf<(i32 imm), [{
    423   // Clr3ImmPred predicate - True if the number is in the series of
    424   // bit negated values:
    425   // [ 2^0, 2^1, ... 2^7 ].
    426   // For use in setbit and clrbit immediate.
    427   uint8_t v = ~ (int8_t)N->getSExtValue();
    428   // Constrain to 8 bits, and then check for single bit.
    429   return ImmIsSingleBit(v);
    430 }]>;
    431 
    432 def SetClr3ImmPred : PatLeaf<(i32 imm), [{
    433   // SetClr3ImmPred predicate - True if the immediate is in the range  0..7.
    434   int8_t v = (int8_t)N->getSExtValue();
    435   return (v >= 0 && v <= 7);
    436 }]>;
    437 
    438 
    439 // Extendable immediate operands.
    440 
    441 let PrintMethod = "printExtOperand" in {
    442   def s16Ext : Operand<i32>;
    443   def s12Ext : Operand<i32>;
    444   def s10Ext : Operand<i32>;
    445   def s9Ext : Operand<i32>;
    446   def s8Ext : Operand<i32>;
    447   def s6Ext : Operand<i32>;
    448   def s11_0Ext : Operand<i32>;
    449   def s11_1Ext : Operand<i32>;
    450   def s11_2Ext : Operand<i32>;
    451   def s11_3Ext : Operand<i32>;
    452   def u6Ext : Operand<i32>;
    453   def u7Ext : Operand<i32>;
    454   def u8Ext : Operand<i32>;
    455   def u9Ext : Operand<i32>;
    456   def u10Ext : Operand<i32>;
    457   def u6_0Ext : Operand<i32>;
    458   def u6_1Ext : Operand<i32>;
    459   def u6_2Ext : Operand<i32>;
    460   def u6_3Ext : Operand<i32>;
    461 }
    462 
    463 
    464 // This complex pattern exists only to create a machine instruction operand
    465 // of type "frame index". There doesn't seem to be a way to do that directly
    466 // in the patterns.
    467 def AddrFI : ComplexPattern<i32, 1, "SelectAddrFI", [frameindex], []>;
    468 
    469 // These complex patterns are not strictly necessary, since global address
    470 // folding will happen during DAG combining. For distinguishing between GA
    471 // and GP, pat frags with HexagonCONST32 and HexagonCONST32_GP can be used.
    472 def AddrGA : ComplexPattern<i32, 1, "SelectAddrGA", [], []>;
    473 def AddrGP : ComplexPattern<i32, 1, "SelectAddrGP", [], []>;
    474 
    475 // Address operands.
    476 
    477 let PrintMethod = "printGlobalOperand" in {
    478   def globaladdress : Operand<i32>;
    479   def globaladdressExt : Operand<i32>;
    480 }
    481 
    482 let PrintMethod = "printJumpTable" in
    483 def jumptablebase : Operand<i32>;
    484 
    485 def brtarget : Operand<OtherVT>;
    486 def brtargetExt : Operand<OtherVT>;
    487 def calltarget : Operand<i32>;
    488 
    489 def bblabel : Operand<i32>;
    490 def bbl   : SDNode<"ISD::BasicBlock", SDTPtrLeaf   , [], "BasicBlockSDNode">;
    491 
    492 def symbolHi32 : Operand<i32> {
    493   let PrintMethod = "printSymbolHi";
    494 }
    495 def symbolLo32 : Operand<i32> {
    496   let PrintMethod = "printSymbolLo";
    497 }
    498 
    499 // Return true if for a 32 to 64-bit sign-extended load.
    500 def is_sext_i32 : PatLeaf<(i64 DoubleRegs:$src1), [{
    501   LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
    502   if (!LD)
    503     return false;
    504   return LD->getExtensionType() == ISD::SEXTLOAD &&
    505          LD->getMemoryVT().getScalarType() == MVT::i32;
    506 }]>;
    507