1 //===-- HexagonMCCodeEmitter.h - Hexagon Target Descriptions ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief Definition for classes that emit Hexagon machine code from MCInsts 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #ifndef HEXAGONMCCODEEMITTER_H 16 #define HEXAGONMCCODEEMITTER_H 17 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/MC/MCExpr.h" 20 #include "llvm/MC/MCInst.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/Support/raw_ostream.h" 25 26 namespace llvm { 27 28 class HexagonMCCodeEmitter : public MCCodeEmitter { 29 MCContext &MCT; 30 MCInstrInfo const &MCII; 31 32 public: 33 HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT); 34 35 MCSubtargetInfo const &getSubtargetInfo() const; 36 37 void EncodeInstruction(MCInst const &MI, raw_ostream &OS, 38 SmallVectorImpl<MCFixup> &Fixups, 39 MCSubtargetInfo const &STI) const override; 40 41 // \brief TableGen'erated function for getting the 42 // binary encoding for an instruction. 43 uint64_t getBinaryCodeForInstr(MCInst const &MI, 44 SmallVectorImpl<MCFixup> &Fixups, 45 MCSubtargetInfo const &STI) const; 46 47 /// \brief Return binary encoding of operand. 48 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO, 49 SmallVectorImpl<MCFixup> &Fixups, 50 MCSubtargetInfo const &STI) const; 51 52 private: 53 HexagonMCCodeEmitter(HexagonMCCodeEmitter const &) = delete; 54 void operator=(HexagonMCCodeEmitter const &) = delete; 55 }; // class HexagonMCCodeEmitter 56 57 } // namespace llvm 58 59 #endif /* HEXAGONMCCODEEMITTER_H */ 60
