1 //===----------------------------------------------------------------------===// 2 // MicroMIPS Base Classes 3 //===----------------------------------------------------------------------===// 4 5 // 6 // Base class for MicroMips instructions. 7 // This class does not depend on the instruction size. 8 // 9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern, 10 InstrItinClass itin, Format f> : Instruction 11 { 12 let Namespace = "Mips"; 13 let DecoderNamespace = "MicroMips"; 14 15 let OutOperandList = outs; 16 let InOperandList = ins; 17 18 let AsmString = asmstr; 19 let Pattern = pattern; 20 let Itinerary = itin; 21 22 let Predicates = [InMicroMips]; 23 24 Format Form = f; 25 } 26 27 // 28 // Base class for MicroMIPS 16-bit instructions. 29 // 30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern, 31 InstrItinClass itin, Format f> : 32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f> 33 { 34 let Size = 2; 35 field bits<16> Inst; 36 field bits<16> SoftFail = 0; 37 bits<6> Opcode = 0x0; 38 } 39 40 //===----------------------------------------------------------------------===// 41 // MicroMIPS 16-bit Instruction Formats 42 //===----------------------------------------------------------------------===// 43 44 class ARITH_FM_MM16<bit funct> { 45 bits<3> rd; 46 bits<3> rt; 47 bits<3> rs; 48 49 bits<16> Inst; 50 51 let Inst{15-10} = 0x01; 52 let Inst{9-7} = rd; 53 let Inst{6-4} = rt; 54 let Inst{3-1} = rs; 55 let Inst{0} = funct; 56 } 57 58 class ANDI_FM_MM16<bits<6> funct> { 59 bits<3> rd; 60 bits<3> rs; 61 bits<4> imm; 62 63 bits<16> Inst; 64 65 let Inst{15-10} = funct; 66 let Inst{9-7} = rd; 67 let Inst{6-4} = rs; 68 let Inst{3-0} = imm; 69 } 70 71 class LOGIC_FM_MM16<bits<4> funct> { 72 bits<3> rt; 73 bits<3> rs; 74 75 bits<16> Inst; 76 77 let Inst{15-10} = 0x11; 78 let Inst{9-6} = funct; 79 let Inst{5-3} = rt; 80 let Inst{2-0} = rs; 81 } 82 83 class SHIFT_FM_MM16<bits<1> funct> { 84 bits<3> rd; 85 bits<3> rt; 86 bits<3> shamt; 87 88 bits<16> Inst; 89 90 let Inst{15-10} = 0x09; 91 let Inst{9-7} = rd; 92 let Inst{6-4} = rt; 93 let Inst{3-1} = shamt; 94 let Inst{0} = funct; 95 } 96 97 class ADDIUR2_FM_MM16 { 98 bits<3> rd; 99 bits<3> rs; 100 bits<3> imm; 101 102 bits<16> Inst; 103 104 let Inst{15-10} = 0x1b; 105 let Inst{9-7} = rd; 106 let Inst{6-4} = rs; 107 let Inst{3-1} = imm; 108 let Inst{0} = 0; 109 } 110 111 class LOAD_STORE_FM_MM16<bits<6> op> { 112 bits<3> rt; 113 bits<7> addr; 114 115 bits<16> Inst; 116 117 let Inst{15-10} = op; 118 let Inst{9-7} = rt; 119 let Inst{6-4} = addr{6-4}; 120 let Inst{3-0} = addr{3-0}; 121 } 122 123 class LOAD_STORE_SP_FM_MM16<bits<6> op> { 124 bits<5> rt; 125 bits<5> offset; 126 127 bits<16> Inst; 128 129 let Inst{15-10} = op; 130 let Inst{9-5} = rt; 131 let Inst{4-0} = offset; 132 } 133 134 class LOAD_GP_FM_MM16<bits<6> op> { 135 bits<3> rt; 136 bits<7> offset; 137 138 bits<16> Inst; 139 140 let Inst{15-10} = op; 141 let Inst{9-7} = rt; 142 let Inst{6-0} = offset; 143 } 144 145 class ADDIUS5_FM_MM16 { 146 bits<5> rd; 147 bits<4> imm; 148 149 bits<16> Inst; 150 151 let Inst{15-10} = 0x13; 152 let Inst{9-5} = rd; 153 let Inst{4-1} = imm; 154 let Inst{0} = 0; 155 } 156 157 class ADDIUSP_FM_MM16 { 158 bits<9> imm; 159 160 bits<16> Inst; 161 162 let Inst{15-10} = 0x13; 163 let Inst{9-1} = imm; 164 let Inst{0} = 1; 165 } 166 167 class MOVE_FM_MM16<bits<6> funct> { 168 bits<5> rs; 169 bits<5> rd; 170 171 bits<16> Inst; 172 173 let Inst{15-10} = funct; 174 let Inst{9-5} = rd; 175 let Inst{4-0} = rs; 176 } 177 178 class LI_FM_MM16 { 179 bits<3> rd; 180 bits<7> imm; 181 182 bits<16> Inst; 183 184 let Inst{15-10} = 0x3b; 185 let Inst{9-7} = rd; 186 let Inst{6-0} = imm; 187 } 188 189 class JALR_FM_MM16<bits<5> op> { 190 bits<5> rs; 191 192 bits<16> Inst; 193 194 let Inst{15-10} = 0x11; 195 let Inst{9-5} = op; 196 let Inst{4-0} = rs; 197 } 198 199 class MFHILO_FM_MM16<bits<5> funct> { 200 bits<5> rd; 201 202 bits<16> Inst; 203 204 let Inst{15-10} = 0x11; 205 let Inst{9-5} = funct; 206 let Inst{4-0} = rd; 207 } 208 209 class JRADDIUSP_FM_MM16<bits<5> op> { 210 bits<5> rs; 211 bits<5> imm; 212 213 bits<16> Inst; 214 215 let Inst{15-10} = 0x11; 216 let Inst{9-5} = op; 217 let Inst{4-0} = imm; 218 } 219 220 class ADDIUR1SP_FM_MM16 { 221 bits<3> rd; 222 bits<6> imm; 223 224 bits<16> Inst; 225 226 let Inst{15-10} = 0x1b; 227 let Inst{9-7} = rd; 228 let Inst{6-1} = imm; 229 let Inst{0} = 1; 230 } 231 232 class BRKSDBBP16_FM_MM<bits<6> op> { 233 bits<4> code_; 234 bits<16> Inst; 235 236 let Inst{15-10} = 0x11; 237 let Inst{9-4} = op; 238 let Inst{3-0} = code_; 239 } 240 241 class BEQNEZ_FM_MM16<bits<6> op> { 242 bits<3> rs; 243 bits<7> offset; 244 245 bits<16> Inst; 246 247 let Inst{15-10} = op; 248 let Inst{9-7} = rs; 249 let Inst{6-0} = offset; 250 } 251 252 class B16_FM { 253 bits<10> offset; 254 255 bits<16> Inst; 256 257 let Inst{15-10} = 0x33; 258 let Inst{9-0} = offset; 259 } 260 261 class MOVEP_FM_MM16 { 262 bits<3> dst_regs; 263 bits<3> rt; 264 bits<3> rs; 265 266 bits<16> Inst; 267 268 let Inst{15-10} = 0x21; 269 let Inst{9-7} = dst_regs; 270 let Inst{6-4} = rt; 271 let Inst{3-1} = rs; 272 let Inst{0} = 0; 273 } 274 275 //===----------------------------------------------------------------------===// 276 // MicroMIPS 32-bit Instruction Formats 277 //===----------------------------------------------------------------------===// 278 279 class MMArch { 280 string Arch = "micromips"; 281 list<dag> Pattern = []; 282 } 283 284 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch { 285 bits<5> rt; 286 bits<5> rs; 287 bits<5> rd; 288 289 bits<32> Inst; 290 291 let Inst{31-26} = op; 292 let Inst{25-21} = rt; 293 let Inst{20-16} = rs; 294 let Inst{15-11} = rd; 295 let Inst{10} = 0; 296 let Inst{9-0} = funct; 297 } 298 299 class ADDI_FM_MM<bits<6> op> : MMArch { 300 bits<5> rs; 301 bits<5> rt; 302 bits<16> imm16; 303 304 bits<32> Inst; 305 306 let Inst{31-26} = op; 307 let Inst{25-21} = rt; 308 let Inst{20-16} = rs; 309 let Inst{15-0} = imm16; 310 } 311 312 class SLTI_FM_MM<bits<6> op> : MMArch { 313 bits<5> rt; 314 bits<5> rs; 315 bits<16> imm16; 316 317 bits<32> Inst; 318 319 let Inst{31-26} = op; 320 let Inst{25-21} = rt; 321 let Inst{20-16} = rs; 322 let Inst{15-0} = imm16; 323 } 324 325 class LUI_FM_MM : MMArch { 326 bits<5> rt; 327 bits<16> imm16; 328 329 bits<32> Inst; 330 331 let Inst{31-26} = 0x10; 332 let Inst{25-21} = 0xd; 333 let Inst{20-16} = rt; 334 let Inst{15-0} = imm16; 335 } 336 337 class MULT_FM_MM<bits<10> funct> : MMArch { 338 bits<5> rs; 339 bits<5> rt; 340 341 bits<32> Inst; 342 343 let Inst{31-26} = 0x00; 344 let Inst{25-21} = rt; 345 let Inst{20-16} = rs; 346 let Inst{15-6} = funct; 347 let Inst{5-0} = 0x3c; 348 } 349 350 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch { 351 bits<5> rd; 352 bits<5> rt; 353 bits<5> shamt; 354 355 bits<32> Inst; 356 357 let Inst{31-26} = 0; 358 let Inst{25-21} = rd; 359 let Inst{20-16} = rt; 360 let Inst{15-11} = shamt; 361 let Inst{10} = rotate; 362 let Inst{9-0} = funct; 363 } 364 365 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch { 366 bits<5> rd; 367 bits<5> rt; 368 bits<5> rs; 369 370 bits<32> Inst; 371 372 let Inst{31-26} = 0; 373 let Inst{25-21} = rt; 374 let Inst{20-16} = rs; 375 let Inst{15-11} = rd; 376 let Inst{10} = rotate; 377 let Inst{9-0} = funct; 378 } 379 380 class LW_FM_MM<bits<6> op> : MMArch { 381 bits<5> rt; 382 bits<21> addr; 383 384 bits<32> Inst; 385 386 let Inst{31-26} = op; 387 let Inst{25-21} = rt; 388 let Inst{20-16} = addr{20-16}; 389 let Inst{15-0} = addr{15-0}; 390 } 391 392 class LWL_FM_MM<bits<4> funct> { 393 bits<5> rt; 394 bits<21> addr; 395 396 bits<32> Inst; 397 398 let Inst{31-26} = 0x18; 399 let Inst{25-21} = rt; 400 let Inst{20-16} = addr{20-16}; 401 let Inst{15-12} = funct; 402 let Inst{11-0} = addr{11-0}; 403 } 404 405 class CMov_F_I_FM_MM<bits<7> func> : MMArch { 406 bits<5> rd; 407 bits<5> rs; 408 bits<3> fcc; 409 410 bits<32> Inst; 411 412 let Inst{31-26} = 0x15; 413 let Inst{25-21} = rd; 414 let Inst{20-16} = rs; 415 let Inst{15-13} = fcc; 416 let Inst{12-6} = func; 417 let Inst{5-0} = 0x3b; 418 } 419 420 class MTLO_FM_MM<bits<10> funct> : MMArch { 421 bits<5> rs; 422 423 bits<32> Inst; 424 425 let Inst{31-26} = 0x00; 426 let Inst{25-21} = 0x00; 427 let Inst{20-16} = rs; 428 let Inst{15-6} = funct; 429 let Inst{5-0} = 0x3c; 430 } 431 432 class MFLO_FM_MM<bits<10> funct> : MMArch { 433 bits<5> rd; 434 435 bits<32> Inst; 436 437 let Inst{31-26} = 0x00; 438 let Inst{25-21} = 0x00; 439 let Inst{20-16} = rd; 440 let Inst{15-6} = funct; 441 let Inst{5-0} = 0x3c; 442 } 443 444 class CLO_FM_MM<bits<10> funct> : MMArch { 445 bits<5> rd; 446 bits<5> rs; 447 448 bits<32> Inst; 449 450 let Inst{31-26} = 0x00; 451 let Inst{25-21} = rd; 452 let Inst{20-16} = rs; 453 let Inst{15-6} = funct; 454 let Inst{5-0} = 0x3c; 455 } 456 457 class SEB_FM_MM<bits<10> funct> : MMArch { 458 bits<5> rd; 459 bits<5> rt; 460 461 bits<32> Inst; 462 463 let Inst{31-26} = 0x00; 464 let Inst{25-21} = rd; 465 let Inst{20-16} = rt; 466 let Inst{15-6} = funct; 467 let Inst{5-0} = 0x3c; 468 } 469 470 class EXT_FM_MM<bits<6> funct> : MMArch { 471 bits<5> rt; 472 bits<5> rs; 473 bits<5> pos; 474 bits<5> size; 475 476 bits<32> Inst; 477 478 let Inst{31-26} = 0x00; 479 let Inst{25-21} = rt; 480 let Inst{20-16} = rs; 481 let Inst{15-11} = size; 482 let Inst{10-6} = pos; 483 let Inst{5-0} = funct; 484 } 485 486 class J_FM_MM<bits<6> op> : MMArch { 487 bits<26> target; 488 489 bits<32> Inst; 490 491 let Inst{31-26} = op; 492 let Inst{25-0} = target; 493 } 494 495 class JR_FM_MM<bits<8> funct> : MMArch { 496 bits<5> rs; 497 498 bits<32> Inst; 499 500 let Inst{31-21} = 0x00; 501 let Inst{20-16} = rs; 502 let Inst{15-14} = 0x0; 503 let Inst{13-6} = funct; 504 let Inst{5-0} = 0x3c; 505 } 506 507 class JALR_FM_MM<bits<10> funct> { 508 bits<5> rs; 509 bits<5> rd; 510 511 bits<32> Inst; 512 513 let Inst{31-26} = 0x00; 514 let Inst{25-21} = rd; 515 let Inst{20-16} = rs; 516 let Inst{15-6} = funct; 517 let Inst{5-0} = 0x3c; 518 } 519 520 class BEQ_FM_MM<bits<6> op> : MMArch { 521 bits<5> rs; 522 bits<5> rt; 523 bits<16> offset; 524 525 bits<32> Inst; 526 527 let Inst{31-26} = op; 528 let Inst{25-21} = rt; 529 let Inst{20-16} = rs; 530 let Inst{15-0} = offset; 531 } 532 533 class BGEZ_FM_MM<bits<5> funct> : MMArch { 534 bits<5> rs; 535 bits<16> offset; 536 537 bits<32> Inst; 538 539 let Inst{31-26} = 0x10; 540 let Inst{25-21} = funct; 541 let Inst{20-16} = rs; 542 let Inst{15-0} = offset; 543 } 544 545 class BGEZAL_FM_MM<bits<5> funct> : MMArch { 546 bits<5> rs; 547 bits<16> offset; 548 549 bits<32> Inst; 550 551 let Inst{31-26} = 0x10; 552 let Inst{25-21} = funct; 553 let Inst{20-16} = rs; 554 let Inst{15-0} = offset; 555 } 556 557 class SYNC_FM_MM : MMArch { 558 bits<5> stype; 559 560 bits<32> Inst; 561 562 let Inst{31-26} = 0x00; 563 let Inst{25-21} = 0x0; 564 let Inst{20-16} = stype; 565 let Inst{15-6} = 0x1ad; 566 let Inst{5-0} = 0x3c; 567 } 568 569 class BRK_FM_MM : MMArch { 570 bits<10> code_1; 571 bits<10> code_2; 572 bits<32> Inst; 573 let Inst{31-26} = 0x0; 574 let Inst{25-16} = code_1; 575 let Inst{15-6} = code_2; 576 let Inst{5-0} = 0x07; 577 } 578 579 class SYS_FM_MM : MMArch { 580 bits<10> code_; 581 bits<32> Inst; 582 let Inst{31-26} = 0x0; 583 let Inst{25-16} = code_; 584 let Inst{15-6} = 0x22d; 585 let Inst{5-0} = 0x3c; 586 } 587 588 class WAIT_FM_MM { 589 bits<10> code_; 590 bits<32> Inst; 591 592 let Inst{31-26} = 0x00; 593 let Inst{25-16} = code_; 594 let Inst{15-6} = 0x24d; 595 let Inst{5-0} = 0x3c; 596 } 597 598 class ER_FM_MM<bits<10> funct> : MMArch { 599 bits<32> Inst; 600 601 let Inst{31-26} = 0x00; 602 let Inst{25-16} = 0x00; 603 let Inst{15-6} = funct; 604 let Inst{5-0} = 0x3c; 605 } 606 607 class EI_FM_MM<bits<10> funct> : MMArch { 608 bits<32> Inst; 609 bits<5> rt; 610 611 let Inst{31-26} = 0x00; 612 let Inst{25-21} = 0x00; 613 let Inst{20-16} = rt; 614 let Inst{15-6} = funct; 615 let Inst{5-0} = 0x3c; 616 } 617 618 class TEQ_FM_MM<bits<6> funct> : MMArch { 619 bits<5> rs; 620 bits<5> rt; 621 bits<4> code_; 622 623 bits<32> Inst; 624 625 let Inst{31-26} = 0x00; 626 let Inst{25-21} = rt; 627 let Inst{20-16} = rs; 628 let Inst{15-12} = code_; 629 let Inst{11-6} = funct; 630 let Inst{5-0} = 0x3c; 631 } 632 633 class TEQI_FM_MM<bits<5> funct> : MMArch { 634 bits<5> rs; 635 bits<16> imm16; 636 637 bits<32> Inst; 638 639 let Inst{31-26} = 0x10; 640 let Inst{25-21} = funct; 641 let Inst{20-16} = rs; 642 let Inst{15-0} = imm16; 643 } 644 645 class LL_FM_MM<bits<4> funct> { 646 bits<5> rt; 647 bits<21> addr; 648 649 bits<32> Inst; 650 651 let Inst{31-26} = 0x18; 652 let Inst{25-21} = rt; 653 let Inst{20-16} = addr{20-16}; 654 let Inst{15-12} = funct; 655 let Inst{11-0} = addr{11-0}; 656 } 657 658 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch { 659 bits<5> ft; 660 bits<5> fs; 661 bits<5> fd; 662 663 bits<32> Inst; 664 665 let Inst{31-26} = 0x15; 666 let Inst{25-21} = ft; 667 let Inst{20-16} = fs; 668 let Inst{15-11} = fd; 669 let Inst{10} = 0; 670 let Inst{9-8} = fmt; 671 let Inst{7-0} = funct; 672 673 list<dag> Pattern = []; 674 } 675 676 class LWXC1_FM_MM<bits<9> funct> : MMArch { 677 bits<5> fd; 678 bits<5> base; 679 bits<5> index; 680 681 bits<32> Inst; 682 683 let Inst{31-26} = 0x15; 684 let Inst{25-21} = index; 685 let Inst{20-16} = base; 686 let Inst{15-11} = fd; 687 let Inst{10-9} = 0x0; 688 let Inst{8-0} = funct; 689 } 690 691 class SWXC1_FM_MM<bits<9> funct> : MMArch { 692 bits<5> fs; 693 bits<5> base; 694 bits<5> index; 695 696 bits<32> Inst; 697 698 let Inst{31-26} = 0x15; 699 let Inst{25-21} = index; 700 let Inst{20-16} = base; 701 let Inst{15-11} = fs; 702 let Inst{10-9} = 0x0; 703 let Inst{8-0} = funct; 704 } 705 706 class CEQS_FM_MM<bits<2> fmt> : MMArch { 707 bits<5> fs; 708 bits<5> ft; 709 bits<4> cond; 710 711 bits<32> Inst; 712 713 let Inst{31-26} = 0x15; 714 let Inst{25-21} = ft; 715 let Inst{20-16} = fs; 716 let Inst{15-13} = 0x0; // cc 717 let Inst{12} = 0; 718 let Inst{11-10} = fmt; 719 let Inst{9-6} = cond; 720 let Inst{5-0} = 0x3c; 721 } 722 723 class BC1F_FM_MM<bits<5> tf> : MMArch { 724 bits<16> offset; 725 726 bits<32> Inst; 727 728 let Inst{31-26} = 0x10; 729 let Inst{25-21} = tf; 730 let Inst{20-18} = 0x0; // cc 731 let Inst{17-16} = 0x0; 732 let Inst{15-0} = offset; 733 } 734 735 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch { 736 bits<5> fd; 737 bits<5> fs; 738 739 bits<32> Inst; 740 741 let Inst{31-26} = 0x15; 742 let Inst{25-21} = fd; 743 let Inst{20-16} = fs; 744 let Inst{15} = 0; 745 let Inst{14} = fmt; 746 let Inst{13-6} = funct; 747 let Inst{5-0} = 0x3b; 748 } 749 750 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch { 751 bits<5> fd; 752 bits<5> fs; 753 754 bits<32> Inst; 755 756 let Inst{31-26} = 0x15; 757 let Inst{25-21} = fd; 758 let Inst{20-16} = fs; 759 let Inst{15} = 0; 760 let Inst{14-13} = fmt; 761 let Inst{12-6} = funct; 762 let Inst{5-0} = 0x3b; 763 } 764 765 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch { 766 bits<5> fd; 767 bits<5> fs; 768 769 bits<32> Inst; 770 771 let Inst{31-26} = 0x15; 772 let Inst{25-21} = fd; 773 let Inst{20-16} = fs; 774 let Inst{15-13} = 0x0; //cc 775 let Inst{12-11} = 0x0; 776 let Inst{10-9} = fmt; 777 let Inst{8-0} = func; 778 } 779 780 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch { 781 bits<5> fd; 782 bits<5> fs; 783 bits<5> rt; 784 785 bits<32> Inst; 786 787 let Inst{31-26} = 0x15; 788 let Inst{25-21} = rt; 789 let Inst{20-16} = fs; 790 let Inst{15-11} = fd; 791 let Inst{9-8} = fmt; 792 let Inst{7-0} = funct; 793 } 794 795 class MFC1_FM_MM<bits<8> funct> : MMArch { 796 bits<5> rt; 797 bits<5> fs; 798 799 bits<32> Inst; 800 801 let Inst{31-26} = 0x15; 802 let Inst{25-21} = rt; 803 let Inst{20-16} = fs; 804 let Inst{15-14} = 0x0; 805 let Inst{13-6} = funct; 806 let Inst{5-0} = 0x3b; 807 } 808 809 class MADDS_FM_MM<bits<6> funct>: MMArch { 810 bits<5> ft; 811 bits<5> fs; 812 bits<5> fd; 813 bits<5> fr; 814 815 bits<32> Inst; 816 817 let Inst{31-26} = 0x15; 818 let Inst{25-21} = ft; 819 let Inst{20-16} = fs; 820 let Inst{15-11} = fd; 821 let Inst{10-6} = fr; 822 let Inst{5-0} = funct; 823 } 824 825 class COMPACT_BRANCH_FM_MM<bits<5> funct> { 826 bits<5> rs; 827 bits<16> offset; 828 829 bits<32> Inst; 830 831 let Inst{31-26} = 0x10; 832 let Inst{25-21} = funct; 833 let Inst{20-16} = rs; 834 let Inst{15-0} = offset; 835 } 836 837 class COP0_TLB_FM_MM<bits<10> op> : MMArch { 838 bits<32> Inst; 839 840 let Inst{31-26} = 0x0; 841 let Inst{25-16} = 0x0; 842 let Inst{15-6} = op; 843 let Inst{5-0} = 0x3c; 844 } 845 846 class SDBBP_FM_MM : MMArch { 847 bits<10> code_; 848 849 bits<32> Inst; 850 851 let Inst{31-26} = 0x0; 852 let Inst{25-16} = code_; 853 let Inst{15-6} = 0x36d; 854 let Inst{5-0} = 0x3c; 855 } 856 857 class RDHWR_FM_MM : MMArch { 858 bits<5> rt; 859 bits<5> rd; 860 861 bits<32> Inst; 862 863 let Inst{31-26} = 0x0; 864 let Inst{25-21} = rt; 865 let Inst{20-16} = rd; 866 let Inst{15-6} = 0x1ac; 867 let Inst{5-0} = 0x3c; 868 } 869 870 class LWXS_FM_MM<bits<10> funct> { 871 bits<5> rd; 872 bits<5> base; 873 bits<5> index; 874 875 bits<32> Inst; 876 877 let Inst{31-26} = 0x0; 878 let Inst{25-21} = index; 879 let Inst{20-16} = base; 880 let Inst{15-11} = rd; 881 let Inst{10} = 0; 882 let Inst{9-0} = funct; 883 } 884 885 class LWM_FM_MM<bits<4> funct> : MMArch { 886 bits<5> rt; 887 bits<21> addr; 888 889 bits<32> Inst; 890 891 let Inst{31-26} = 0x8; 892 let Inst{25-21} = rt; 893 let Inst{20-16} = addr{20-16}; 894 let Inst{15-12} = funct; 895 let Inst{11-0} = addr{11-0}; 896 } 897 898 class LWM_FM_MM16<bits<4> funct> : MMArch { 899 bits<2> rt; 900 bits<4> addr; 901 902 bits<16> Inst; 903 904 let Inst{15-10} = 0x11; 905 let Inst{9-6} = funct; 906 let Inst{5-4} = rt; 907 let Inst{3-0} = addr; 908 } 909 910 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch { 911 bits<21> addr; 912 bits<5> hint; 913 bits<5> base = addr{20-16}; 914 bits<12> offset = addr{11-0}; 915 916 bits<32> Inst; 917 918 let Inst{31-26} = op; 919 let Inst{25-21} = hint; 920 let Inst{20-16} = base; 921 let Inst{15-12} = funct; 922 let Inst{11-0} = offset; 923 } 924 925 class BARRIER_FM_MM<bits<5> op> : MMArch { 926 bits<32> Inst; 927 928 let Inst{31-26} = 0x0; 929 let Inst{25-21} = 0x0; 930 let Inst{20-16} = 0x0; 931 let Inst{15-11} = op; 932 let Inst{10-6} = 0x0; 933 let Inst{5-0} = 0x0; 934 } 935 936 class ADDIUPC_FM_MM { 937 bits<3> rs; 938 bits<23> imm; 939 940 bits<32> Inst; 941 942 let Inst{31-26} = 0x1e; 943 let Inst{25-23} = rs; 944 let Inst{22-0} = imm; 945 } 946
