1 //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief Provides AMDGPU specific target descriptions. 12 // 13 //===----------------------------------------------------------------------===// 14 // 15 16 #ifndef LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H 17 #define LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H 18 19 #include "llvm/Support/DataTypes.h" 20 #include "llvm/ADT/StringRef.h" 21 22 namespace llvm { 23 class MCAsmBackend; 24 class MCCodeEmitter; 25 class MCContext; 26 class MCInstrInfo; 27 class MCObjectWriter; 28 class MCRegisterInfo; 29 class MCSubtargetInfo; 30 class Target; 31 class raw_pwrite_stream; 32 class raw_ostream; 33 34 extern Target TheAMDGPUTarget; 35 extern Target TheGCNTarget; 36 37 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, 38 const MCRegisterInfo &MRI, 39 MCContext &Ctx); 40 41 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, 42 const MCRegisterInfo &MRI, 43 MCContext &Ctx); 44 45 MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI, 46 StringRef TT, StringRef CPU); 47 48 MCObjectWriter *createAMDGPUELFObjectWriter(raw_pwrite_stream &OS); 49 } // End llvm namespace 50 51 #define GET_REGINFO_ENUM 52 #include "AMDGPUGenRegisterInfo.inc" 53 54 #define GET_INSTRINFO_ENUM 55 #include "AMDGPUGenInstrInfo.inc" 56 57 #define GET_SUBTARGETINFO_ENUM 58 #include "AMDGPUGenSubtargetInfo.inc" 59 60 #endif 61
