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      1 ; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon | FileCheck %s
      2 
      3 define <8 x i8> @test_vget_high_s8(<16 x i8> %a) {
      4 ; CHECK-LABEL: test_vget_high_s8:
      5 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
      6 entry:
      7   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
      8   ret <8 x i8> %shuffle.i
      9 }
     10 
     11 define <4 x i16> @test_vget_high_s16(<8 x i16> %a) {
     12 ; CHECK-LABEL: test_vget_high_s16:
     13 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     14 entry:
     15   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
     16   ret <4 x i16> %shuffle.i
     17 }
     18 
     19 define <2 x i32> @test_vget_high_s32(<4 x i32> %a) {
     20 ; CHECK-LABEL: test_vget_high_s32:
     21 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     22 entry:
     23   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
     24   ret <2 x i32> %shuffle.i
     25 }
     26 
     27 define <1 x i64> @test_vget_high_s64(<2 x i64> %a) {
     28 ; CHECK-LABEL: test_vget_high_s64:
     29 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     30 entry:
     31   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> <i32 1>
     32   ret <1 x i64> %shuffle.i
     33 }
     34 
     35 define <8 x i8> @test_vget_high_u8(<16 x i8> %a) {
     36 ; CHECK-LABEL: test_vget_high_u8:
     37 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     38 entry:
     39   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
     40   ret <8 x i8> %shuffle.i
     41 }
     42 
     43 define <4 x i16> @test_vget_high_u16(<8 x i16> %a) {
     44 ; CHECK-LABEL: test_vget_high_u16:
     45 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     46 entry:
     47   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
     48   ret <4 x i16> %shuffle.i
     49 }
     50 
     51 define <2 x i32> @test_vget_high_u32(<4 x i32> %a) {
     52 ; CHECK-LABEL: test_vget_high_u32:
     53 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     54 entry:
     55   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
     56   ret <2 x i32> %shuffle.i
     57 }
     58 
     59 define <1 x i64> @test_vget_high_u64(<2 x i64> %a) {
     60 ; CHECK-LABEL: test_vget_high_u64:
     61 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     62 entry:
     63   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> <i32 1>
     64   ret <1 x i64> %shuffle.i
     65 }
     66 
     67 define <1 x i64> @test_vget_high_p64(<2 x i64> %a) {
     68 ; CHECK-LABEL: test_vget_high_p64:
     69 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     70 entry:
     71   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> <i32 1>
     72   ret <1 x i64> %shuffle.i
     73 }
     74 
     75 define <4 x i16> @test_vget_high_f16(<8 x i16> %a) {
     76 ; CHECK-LABEL: test_vget_high_f16:
     77 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     78 entry:
     79   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
     80   ret <4 x i16> %shuffle.i
     81 }
     82 
     83 define <2 x float> @test_vget_high_f32(<4 x float> %a) {
     84 ; CHECK-LABEL: test_vget_high_f32:
     85 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     86 entry:
     87   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 2, i32 3>
     88   ret <2 x float> %shuffle.i
     89 }
     90 
     91 define <8 x i8> @test_vget_high_p8(<16 x i8> %a) {
     92 ; CHECK-LABEL: test_vget_high_p8:
     93 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
     94 entry:
     95   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
     96   ret <8 x i8> %shuffle.i
     97 }
     98 
     99 define <4 x i16> @test_vget_high_p16(<8 x i16> %a) {
    100 ; CHECK-LABEL: test_vget_high_p16:
    101 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
    102 entry:
    103   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
    104   ret <4 x i16> %shuffle.i
    105 }
    106 
    107 define <1 x double> @test_vget_high_f64(<2 x double> %a) {
    108 ; CHECK-LABEL: test_vget_high_f64:
    109 ; CHECK: ext v0.16b, v0.16b, {{v[0-9]+}}.16b, #8
    110 entry:
    111   %shuffle.i = shufflevector <2 x double> %a, <2 x double> undef, <1 x i32> <i32 1>
    112   ret <1 x double> %shuffle.i
    113 }
    114 
    115 define <8 x i8> @test_vget_low_s8(<16 x i8> %a) {
    116 ; CHECK-LABEL: test_vget_low_s8:
    117 ; CHECK: ret
    118 entry:
    119   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
    120   ret <8 x i8> %shuffle.i
    121 }
    122 
    123 define <4 x i16> @test_vget_low_s16(<8 x i16> %a) {
    124 ; CHECK-LABEL: test_vget_low_s16:
    125 ; CHECK: ret
    126 entry:
    127   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
    128   ret <4 x i16> %shuffle.i
    129 }
    130 
    131 define <2 x i32> @test_vget_low_s32(<4 x i32> %a) {
    132 ; CHECK-LABEL: test_vget_low_s32:
    133 ; CHECK: ret
    134 entry:
    135   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
    136   ret <2 x i32> %shuffle.i
    137 }
    138 
    139 define <1 x i64> @test_vget_low_s64(<2 x i64> %a) {
    140 ; CHECK-LABEL: test_vget_low_s64:
    141 ; CHECK: ret
    142 entry:
    143   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> zeroinitializer
    144   ret <1 x i64> %shuffle.i
    145 }
    146 
    147 define <8 x i8> @test_vget_low_u8(<16 x i8> %a) {
    148 ; CHECK-LABEL: test_vget_low_u8:
    149 ; CHECK: ret
    150 entry:
    151   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
    152   ret <8 x i8> %shuffle.i
    153 }
    154 
    155 define <4 x i16> @test_vget_low_u16(<8 x i16> %a) {
    156 ; CHECK-LABEL: test_vget_low_u16:
    157 ; CHECK: ret
    158 entry:
    159   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
    160   ret <4 x i16> %shuffle.i
    161 }
    162 
    163 define <2 x i32> @test_vget_low_u32(<4 x i32> %a) {
    164 ; CHECK-LABEL: test_vget_low_u32:
    165 ; CHECK: ret
    166 entry:
    167   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
    168   ret <2 x i32> %shuffle.i
    169 }
    170 
    171 define <1 x i64> @test_vget_low_u64(<2 x i64> %a) {
    172 ; CHECK-LABEL: test_vget_low_u64:
    173 ; CHECK: ret
    174 entry:
    175   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> zeroinitializer
    176   ret <1 x i64> %shuffle.i
    177 }
    178 
    179 define <1 x i64> @test_vget_low_p64(<2 x i64> %a) {
    180 ; CHECK-LABEL: test_vget_low_p64:
    181 ; CHECK: ret
    182 entry:
    183   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> zeroinitializer
    184   ret <1 x i64> %shuffle.i
    185 }
    186 
    187 define <4 x i16> @test_vget_low_f16(<8 x i16> %a) {
    188 ; CHECK-LABEL: test_vget_low_f16:
    189 ; CHECK: ret
    190 entry:
    191   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
    192   ret <4 x i16> %shuffle.i
    193 }
    194 
    195 define <2 x float> @test_vget_low_f32(<4 x float> %a) {
    196 ; CHECK-LABEL: test_vget_low_f32:
    197 ; CHECK: ret
    198 entry:
    199   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 1>
    200   ret <2 x float> %shuffle.i
    201 }
    202 
    203 define <8 x i8> @test_vget_low_p8(<16 x i8> %a) {
    204 ; CHECK-LABEL: test_vget_low_p8:
    205 ; CHECK: ret
    206 entry:
    207   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
    208   ret <8 x i8> %shuffle.i
    209 }
    210 
    211 define <4 x i16> @test_vget_low_p16(<8 x i16> %a) {
    212 ; CHECK-LABEL: test_vget_low_p16:
    213 ; CHECK: ret
    214 entry:
    215   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
    216   ret <4 x i16> %shuffle.i
    217 }
    218 
    219 define <1 x double> @test_vget_low_f64(<2 x double> %a) {
    220 ; CHECK-LABEL: test_vget_low_f64:
    221 ; CHECK: ret
    222 entry:
    223   %shuffle.i = shufflevector <2 x double> %a, <2 x double> undef, <1 x i32> zeroinitializer
    224   ret <1 x double> %shuffle.i
    225 }
    226