1 ; RUN: llc -march=mipsel -O0 < %s | FileCheck %s -check-prefix=None 2 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=Default 3 ; RUN: llc -march=mipsel -O1 -relocation-model=static < %s | \ 4 ; RUN: FileCheck %s -check-prefix=STATICO1 5 ; RUN: llc -march=mipsel -disable-mips-df-forward-search=false \ 6 ; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=FORWARD 7 ; RUN: llc -march=mipsel -disable-mips-df-backward-search \ 8 ; RUN: -disable-mips-df-succbb-search=false < %s | \ 9 ; RUN: FileCheck %s -check-prefix=SUCCBB 10 11 define void @foo1() nounwind { 12 entry: 13 ; Default: jalr 14 ; Default-NOT: nop 15 ; Default: jr 16 ; Default-NOT: nop 17 ; Default: .end 18 ; None: jalr 19 ; None: nop 20 ; None: jr 21 ; None: nop 22 ; None: .end 23 24 tail call void @foo2(i32 3) nounwind 25 ret void 26 } 27 28 declare void @foo2(i32) 29 30 ; Check that cvt.d.w goes into jalr's delay slot. 31 ; 32 define void @foo3(i32 %a) nounwind { 33 entry: 34 ; Default-LABEL: foo3: 35 ; Default: jalr 36 ; Default: cvt.d.w 37 38 %conv = sitofp i32 %a to double 39 tail call void @foo4(double %conv) nounwind 40 ret void 41 } 42 43 declare void @foo4(double) 44 45 @g2 = external global i32 46 @g1 = external global i32 47 @g3 = external global i32 48 49 ; Check that branch delay slot can be filled with an instruction with operand 50 ; $1. 51 ; 52 ; Default-LABEL: foo5: 53 ; Default-NOT: nop 54 55 define void @foo5(i32 %a) nounwind { 56 entry: 57 %0 = load i32, i32* @g2, align 4 58 %tobool = icmp eq i32 %a, 0 59 br i1 %tobool, label %if.else, label %if.then 60 61 if.then: 62 %1 = load i32, i32* @g1, align 4 63 %add = add nsw i32 %1, %0 64 store i32 %add, i32* @g1, align 4 65 br label %if.end 66 67 if.else: 68 %2 = load i32, i32* @g3, align 4 69 %sub = sub nsw i32 %2, %0 70 store i32 %sub, i32* @g3, align 4 71 br label %if.end 72 73 if.end: 74 ret void 75 } 76 77 ; Check that delay slot filler can place mov.s or mov.d in delay slot. 78 ; 79 ; Default-LABEL: foo6: 80 ; Default-NOT: nop 81 ; Default: .end foo6 82 83 define void @foo6(float %a0, double %a1) nounwind { 84 entry: 85 tail call void @foo7(double %a1, float %a0) nounwind 86 ret void 87 } 88 89 declare void @foo7(double, float) 90 91 ; Check that a store can move past other memory instructions. 92 ; 93 ; STATICO1-LABEL: foo8: 94 ; STATICO1: jalr ${{[0-9]+}} 95 ; STATICO1-NEXT: sw ${{[0-9]+}}, %lo(g1) 96 97 @foo9 = common global void ()* null, align 4 98 99 define i32 @foo8(i32 %a) nounwind { 100 entry: 101 store i32 %a, i32* @g1, align 4 102 %0 = load void ()*, void ()** @foo9, align 4 103 tail call void %0() nounwind 104 %1 = load i32, i32* @g1, align 4 105 %add = add nsw i32 %1, %a 106 ret i32 %add 107 } 108 109 ; Test searchForward. Check that the second jal's slot is filled with another 110 ; instruction in the same block. 111 ; 112 ; FORWARD-LABEL: foo10: 113 ; FORWARD: jal foo11 114 ; FORWARD: jal foo11 115 ; FORWARD-NOT: nop 116 ; FORWARD: end foo10 117 118 define void @foo10() nounwind { 119 entry: 120 tail call void @foo11() nounwind 121 tail call void @foo11() nounwind 122 store i32 0, i32* @g1, align 4 123 tail call void @foo11() nounwind 124 store i32 0, i32* @g1, align 4 125 ret void 126 } 127 128 declare void @foo11() 129 130 ; Check that delay slots of branches in both the entry block and loop body are 131 ; filled. 132 ; 133 ; SUCCBB-LABEL: succbbs_loop1: 134 ; SUCCBB: blez $5, $BB 135 ; SUCCBB-NEXT: addiu 136 ; SUCCBB: bnez ${{[0-9]+}}, $BB 137 ; SUCCBB-NEXT: addiu 138 139 define i32 @succbbs_loop1(i32* nocapture %a, i32 %n) { 140 entry: 141 %cmp4 = icmp sgt i32 %n, 0 142 br i1 %cmp4, label %for.body, label %for.end 143 144 for.body: ; preds = %entry, %for.body 145 %s.06 = phi i32 [ %add, %for.body ], [ 0, %entry ] 146 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %entry ] 147 %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.05 148 %0 = load i32, i32* %arrayidx, align 4 149 %add = add nsw i32 %0, %s.06 150 %inc = add nsw i32 %i.05, 1 151 %exitcond = icmp eq i32 %inc, %n 152 br i1 %exitcond, label %for.end, label %for.body 153 154 for.end: ; preds = %for.body, %entry 155 %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] 156 ret i32 %s.0.lcssa 157 } 158 159 ; Check that the first branch has its slot filled. 160 ; 161 ; SUCCBB-LABEL: succbbs_br1: 162 ; SUCCBB: beqz ${{[0-9]+}}, $BB 163 ; SUCCBB-NEXT: lw ${{[0-9]+}}, %got(foo101)(${{[0-9]+}}) 164 165 define internal fastcc void @foo101() { 166 entry: 167 tail call void @foo100() 168 tail call void @foo100() 169 ret void 170 } 171 172 define void @succbbs_br1(i32 %a) { 173 entry: 174 %tobool = icmp eq i32 %a, 0 175 br i1 %tobool, label %if.end, label %if.then 176 177 if.then: ; preds = %entry 178 tail call fastcc void @foo101() 179 br label %if.end 180 181 if.end: ; preds = %entry, %if.then 182 ret void 183 } 184 185 declare void @foo100() 186
