1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 3 4 declare i1 @llvm.AMDGPU.class.f32(float, i32) #1 5 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1 6 declare i32 @llvm.r600.read.tidig.x() #1 7 declare float @llvm.fabs.f32(float) #1 8 declare double @llvm.fabs.f64(double) #1 9 10 ; SI-LABEL: {{^}}test_isinf_pattern: 11 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x204{{$}} 12 ; SI: v_cmp_class_f32_e32 vcc, s{{[0-9]+}}, [[MASK]] 13 ; SI-NOT: v_cmp 14 ; SI: s_endpgm 15 define void @test_isinf_pattern(i32 addrspace(1)* nocapture %out, float %x) #0 { 16 %fabs = tail call float @llvm.fabs.f32(float %x) #1 17 %cmp = fcmp oeq float %fabs, 0x7FF0000000000000 18 %ext = zext i1 %cmp to i32 19 store i32 %ext, i32 addrspace(1)* %out, align 4 20 ret void 21 } 22 23 ; SI-LABEL: {{^}}test_not_isinf_pattern_0: 24 ; SI-NOT: v_cmp_class 25 ; SI: s_endpgm 26 define void @test_not_isinf_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 { 27 %fabs = tail call float @llvm.fabs.f32(float %x) #1 28 %cmp = fcmp ueq float %fabs, 0x7FF0000000000000 29 %ext = zext i1 %cmp to i32 30 store i32 %ext, i32 addrspace(1)* %out, align 4 31 ret void 32 } 33 34 ; SI-LABEL: {{^}}test_not_isinf_pattern_1: 35 ; SI-NOT: v_cmp_class 36 ; SI: s_endpgm 37 define void @test_not_isinf_pattern_1(i32 addrspace(1)* nocapture %out, float %x) #0 { 38 %fabs = tail call float @llvm.fabs.f32(float %x) #1 39 %cmp = fcmp oeq float %fabs, 0xFFF0000000000000 40 %ext = zext i1 %cmp to i32 41 store i32 %ext, i32 addrspace(1)* %out, align 4 42 ret void 43 } 44 45 ; SI-LABEL: {{^}}test_isfinite_pattern_0: 46 ; SI-NOT: v_cmp 47 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x1f8{{$}} 48 ; SI: v_cmp_class_f32_e32 vcc, s{{[0-9]+}}, [[MASK]] 49 ; SI-NOT: v_cmp 50 ; SI: s_endpgm 51 define void @test_isfinite_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 { 52 %ord = fcmp ord float %x, 0.000000e+00 53 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1 54 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000 55 %and = and i1 %ord, %ninf 56 %ext = zext i1 %and to i32 57 store i32 %ext, i32 addrspace(1)* %out, align 4 58 ret void 59 } 60 61 ; Use negative infinity 62 ; SI-LABEL: {{^}}test_isfinite_not_pattern_0: 63 ; SI-NOT: v_cmp_class_f32 64 ; SI: s_endpgm 65 define void @test_isfinite_not_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 { 66 %ord = fcmp ord float %x, 0.000000e+00 67 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1 68 %ninf = fcmp une float %x.fabs, 0xFFF0000000000000 69 %and = and i1 %ord, %ninf 70 %ext = zext i1 %and to i32 71 store i32 %ext, i32 addrspace(1)* %out, align 4 72 ret void 73 } 74 75 ; No fabs 76 ; SI-LABEL: {{^}}test_isfinite_not_pattern_1: 77 ; SI-NOT: v_cmp_class_f32 78 ; SI: s_endpgm 79 define void @test_isfinite_not_pattern_1(i32 addrspace(1)* nocapture %out, float %x) #0 { 80 %ord = fcmp ord float %x, 0.000000e+00 81 %ninf = fcmp une float %x, 0x7FF0000000000000 82 %and = and i1 %ord, %ninf 83 %ext = zext i1 %and to i32 84 store i32 %ext, i32 addrspace(1)* %out, align 4 85 ret void 86 } 87 88 ; fabs of different value 89 ; SI-LABEL: {{^}}test_isfinite_not_pattern_2: 90 ; SI-NOT: v_cmp_class_f32 91 ; SI: s_endpgm 92 define void @test_isfinite_not_pattern_2(i32 addrspace(1)* nocapture %out, float %x, float %y) #0 { 93 %ord = fcmp ord float %x, 0.000000e+00 94 %x.fabs = tail call float @llvm.fabs.f32(float %y) #1 95 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000 96 %and = and i1 %ord, %ninf 97 %ext = zext i1 %and to i32 98 store i32 %ext, i32 addrspace(1)* %out, align 4 99 ret void 100 } 101 102 ; Wrong ordered compare type 103 ; SI-LABEL: {{^}}test_isfinite_not_pattern_3: 104 ; SI-NOT: v_cmp_class_f32 105 ; SI: s_endpgm 106 define void @test_isfinite_not_pattern_3(i32 addrspace(1)* nocapture %out, float %x) #0 { 107 %ord = fcmp uno float %x, 0.000000e+00 108 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1 109 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000 110 %and = and i1 %ord, %ninf 111 %ext = zext i1 %and to i32 112 store i32 %ext, i32 addrspace(1)* %out, align 4 113 ret void 114 } 115 116 ; Wrong unordered compare 117 ; SI-LABEL: {{^}}test_isfinite_not_pattern_4: 118 ; SI-NOT: v_cmp_class_f32 119 ; SI: s_endpgm 120 define void @test_isfinite_not_pattern_4(i32 addrspace(1)* nocapture %out, float %x) #0 { 121 %ord = fcmp ord float %x, 0.000000e+00 122 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1 123 %ninf = fcmp one float %x.fabs, 0x7FF0000000000000 124 %and = and i1 %ord, %ninf 125 %ext = zext i1 %and to i32 126 store i32 %ext, i32 addrspace(1)* %out, align 4 127 ret void 128 } 129 130 attributes #0 = { nounwind } 131 attributes #1 = { nounwind readnone } 132
