1 ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s 2 ;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s 3 4 ;CHECK-LABEL: {{^}}gather4_v2: 5 ;CHECK: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 6 define void @gather4_v2() #0 { 7 main_body: 8 %r = call <4 x float> @llvm.SI.gather4.v2i32(<2 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 9 %r0 = extractelement <4 x float> %r, i32 0 10 %r1 = extractelement <4 x float> %r, i32 1 11 %r2 = extractelement <4 x float> %r, i32 2 12 %r3 = extractelement <4 x float> %r, i32 3 13 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 14 ret void 15 } 16 17 ;CHECK-LABEL: {{^}}gather4: 18 ;CHECK: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 19 define void @gather4() #0 { 20 main_body: 21 %r = call <4 x float> @llvm.SI.gather4.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 22 %r0 = extractelement <4 x float> %r, i32 0 23 %r1 = extractelement <4 x float> %r, i32 1 24 %r2 = extractelement <4 x float> %r, i32 2 25 %r3 = extractelement <4 x float> %r, i32 3 26 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 27 ret void 28 } 29 30 ;CHECK-LABEL: {{^}}gather4_cl: 31 ;CHECK: image_gather4_cl {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 32 define void @gather4_cl() #0 { 33 main_body: 34 %r = call <4 x float> @llvm.SI.gather4.cl.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 35 %r0 = extractelement <4 x float> %r, i32 0 36 %r1 = extractelement <4 x float> %r, i32 1 37 %r2 = extractelement <4 x float> %r, i32 2 38 %r3 = extractelement <4 x float> %r, i32 3 39 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 40 ret void 41 } 42 43 ;CHECK-LABEL: {{^}}gather4_l: 44 ;CHECK: image_gather4_l {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 45 define void @gather4_l() #0 { 46 main_body: 47 %r = call <4 x float> @llvm.SI.gather4.l.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 48 %r0 = extractelement <4 x float> %r, i32 0 49 %r1 = extractelement <4 x float> %r, i32 1 50 %r2 = extractelement <4 x float> %r, i32 2 51 %r3 = extractelement <4 x float> %r, i32 3 52 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 53 ret void 54 } 55 56 ;CHECK-LABEL: {{^}}gather4_b: 57 ;CHECK: image_gather4_b {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 58 define void @gather4_b() #0 { 59 main_body: 60 %r = call <4 x float> @llvm.SI.gather4.b.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 61 %r0 = extractelement <4 x float> %r, i32 0 62 %r1 = extractelement <4 x float> %r, i32 1 63 %r2 = extractelement <4 x float> %r, i32 2 64 %r3 = extractelement <4 x float> %r, i32 3 65 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 66 ret void 67 } 68 69 ;CHECK-LABEL: {{^}}gather4_b_cl: 70 ;CHECK: image_gather4_b_cl {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 71 define void @gather4_b_cl() #0 { 72 main_body: 73 %r = call <4 x float> @llvm.SI.gather4.b.cl.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 74 %r0 = extractelement <4 x float> %r, i32 0 75 %r1 = extractelement <4 x float> %r, i32 1 76 %r2 = extractelement <4 x float> %r, i32 2 77 %r3 = extractelement <4 x float> %r, i32 3 78 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 79 ret void 80 } 81 82 ;CHECK-LABEL: {{^}}gather4_b_cl_v8: 83 ;CHECK: image_gather4_b_cl {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 84 define void @gather4_b_cl_v8() #0 { 85 main_body: 86 %r = call <4 x float> @llvm.SI.gather4.b.cl.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 87 %r0 = extractelement <4 x float> %r, i32 0 88 %r1 = extractelement <4 x float> %r, i32 1 89 %r2 = extractelement <4 x float> %r, i32 2 90 %r3 = extractelement <4 x float> %r, i32 3 91 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 92 ret void 93 } 94 95 ;CHECK-LABEL: {{^}}gather4_lz_v2: 96 ;CHECK: image_gather4_lz {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 97 define void @gather4_lz_v2() #0 { 98 main_body: 99 %r = call <4 x float> @llvm.SI.gather4.lz.v2i32(<2 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 100 %r0 = extractelement <4 x float> %r, i32 0 101 %r1 = extractelement <4 x float> %r, i32 1 102 %r2 = extractelement <4 x float> %r, i32 2 103 %r3 = extractelement <4 x float> %r, i32 3 104 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 105 ret void 106 } 107 108 ;CHECK-LABEL: {{^}}gather4_lz: 109 ;CHECK: image_gather4_lz {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 110 define void @gather4_lz() #0 { 111 main_body: 112 %r = call <4 x float> @llvm.SI.gather4.lz.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 113 %r0 = extractelement <4 x float> %r, i32 0 114 %r1 = extractelement <4 x float> %r, i32 1 115 %r2 = extractelement <4 x float> %r, i32 2 116 %r3 = extractelement <4 x float> %r, i32 3 117 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 118 ret void 119 } 120 121 122 123 ;CHECK-LABEL: {{^}}gather4_o: 124 ;CHECK: image_gather4_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 125 define void @gather4_o() #0 { 126 main_body: 127 %r = call <4 x float> @llvm.SI.gather4.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 128 %r0 = extractelement <4 x float> %r, i32 0 129 %r1 = extractelement <4 x float> %r, i32 1 130 %r2 = extractelement <4 x float> %r, i32 2 131 %r3 = extractelement <4 x float> %r, i32 3 132 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 133 ret void 134 } 135 136 ;CHECK-LABEL: {{^}}gather4_cl_o: 137 ;CHECK: image_gather4_cl_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 138 define void @gather4_cl_o() #0 { 139 main_body: 140 %r = call <4 x float> @llvm.SI.gather4.cl.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 141 %r0 = extractelement <4 x float> %r, i32 0 142 %r1 = extractelement <4 x float> %r, i32 1 143 %r2 = extractelement <4 x float> %r, i32 2 144 %r3 = extractelement <4 x float> %r, i32 3 145 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 146 ret void 147 } 148 149 ;CHECK-LABEL: {{^}}gather4_cl_o_v8: 150 ;CHECK: image_gather4_cl_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 151 define void @gather4_cl_o_v8() #0 { 152 main_body: 153 %r = call <4 x float> @llvm.SI.gather4.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 154 %r0 = extractelement <4 x float> %r, i32 0 155 %r1 = extractelement <4 x float> %r, i32 1 156 %r2 = extractelement <4 x float> %r, i32 2 157 %r3 = extractelement <4 x float> %r, i32 3 158 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 159 ret void 160 } 161 162 ;CHECK-LABEL: {{^}}gather4_l_o: 163 ;CHECK: image_gather4_l_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 164 define void @gather4_l_o() #0 { 165 main_body: 166 %r = call <4 x float> @llvm.SI.gather4.l.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 167 %r0 = extractelement <4 x float> %r, i32 0 168 %r1 = extractelement <4 x float> %r, i32 1 169 %r2 = extractelement <4 x float> %r, i32 2 170 %r3 = extractelement <4 x float> %r, i32 3 171 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 172 ret void 173 } 174 175 ;CHECK-LABEL: {{^}}gather4_l_o_v8: 176 ;CHECK: image_gather4_l_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 177 define void @gather4_l_o_v8() #0 { 178 main_body: 179 %r = call <4 x float> @llvm.SI.gather4.l.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 180 %r0 = extractelement <4 x float> %r, i32 0 181 %r1 = extractelement <4 x float> %r, i32 1 182 %r2 = extractelement <4 x float> %r, i32 2 183 %r3 = extractelement <4 x float> %r, i32 3 184 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 185 ret void 186 } 187 188 ;CHECK-LABEL: {{^}}gather4_b_o: 189 ;CHECK: image_gather4_b_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 190 define void @gather4_b_o() #0 { 191 main_body: 192 %r = call <4 x float> @llvm.SI.gather4.b.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 193 %r0 = extractelement <4 x float> %r, i32 0 194 %r1 = extractelement <4 x float> %r, i32 1 195 %r2 = extractelement <4 x float> %r, i32 2 196 %r3 = extractelement <4 x float> %r, i32 3 197 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 198 ret void 199 } 200 201 ;CHECK-LABEL: {{^}}gather4_b_o_v8: 202 ;CHECK: image_gather4_b_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 203 define void @gather4_b_o_v8() #0 { 204 main_body: 205 %r = call <4 x float> @llvm.SI.gather4.b.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 206 %r0 = extractelement <4 x float> %r, i32 0 207 %r1 = extractelement <4 x float> %r, i32 1 208 %r2 = extractelement <4 x float> %r, i32 2 209 %r3 = extractelement <4 x float> %r, i32 3 210 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 211 ret void 212 } 213 214 ;CHECK-LABEL: {{^}}gather4_b_cl_o: 215 ;CHECK: image_gather4_b_cl_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 216 define void @gather4_b_cl_o() #0 { 217 main_body: 218 %r = call <4 x float> @llvm.SI.gather4.b.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 219 %r0 = extractelement <4 x float> %r, i32 0 220 %r1 = extractelement <4 x float> %r, i32 1 221 %r2 = extractelement <4 x float> %r, i32 2 222 %r3 = extractelement <4 x float> %r, i32 3 223 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 224 ret void 225 } 226 227 ;CHECK-LABEL: {{^}}gather4_lz_o: 228 ;CHECK: image_gather4_lz_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 229 define void @gather4_lz_o() #0 { 230 main_body: 231 %r = call <4 x float> @llvm.SI.gather4.lz.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 232 %r0 = extractelement <4 x float> %r, i32 0 233 %r1 = extractelement <4 x float> %r, i32 1 234 %r2 = extractelement <4 x float> %r, i32 2 235 %r3 = extractelement <4 x float> %r, i32 3 236 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 237 ret void 238 } 239 240 241 242 ;CHECK-LABEL: {{^}}gather4_c: 243 ;CHECK: image_gather4_c {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 244 define void @gather4_c() #0 { 245 main_body: 246 %r = call <4 x float> @llvm.SI.gather4.c.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 247 %r0 = extractelement <4 x float> %r, i32 0 248 %r1 = extractelement <4 x float> %r, i32 1 249 %r2 = extractelement <4 x float> %r, i32 2 250 %r3 = extractelement <4 x float> %r, i32 3 251 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 252 ret void 253 } 254 255 ;CHECK-LABEL: {{^}}gather4_c_cl: 256 ;CHECK: image_gather4_c_cl {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 257 define void @gather4_c_cl() #0 { 258 main_body: 259 %r = call <4 x float> @llvm.SI.gather4.c.cl.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 260 %r0 = extractelement <4 x float> %r, i32 0 261 %r1 = extractelement <4 x float> %r, i32 1 262 %r2 = extractelement <4 x float> %r, i32 2 263 %r3 = extractelement <4 x float> %r, i32 3 264 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 265 ret void 266 } 267 268 ;CHECK-LABEL: {{^}}gather4_c_cl_v8: 269 ;CHECK: image_gather4_c_cl {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 270 define void @gather4_c_cl_v8() #0 { 271 main_body: 272 %r = call <4 x float> @llvm.SI.gather4.c.cl.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 273 %r0 = extractelement <4 x float> %r, i32 0 274 %r1 = extractelement <4 x float> %r, i32 1 275 %r2 = extractelement <4 x float> %r, i32 2 276 %r3 = extractelement <4 x float> %r, i32 3 277 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 278 ret void 279 } 280 281 ;CHECK-LABEL: {{^}}gather4_c_l: 282 ;CHECK: image_gather4_c_l {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 283 define void @gather4_c_l() #0 { 284 main_body: 285 %r = call <4 x float> @llvm.SI.gather4.c.l.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 286 %r0 = extractelement <4 x float> %r, i32 0 287 %r1 = extractelement <4 x float> %r, i32 1 288 %r2 = extractelement <4 x float> %r, i32 2 289 %r3 = extractelement <4 x float> %r, i32 3 290 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 291 ret void 292 } 293 294 ;CHECK-LABEL: {{^}}gather4_c_l_v8: 295 ;CHECK: image_gather4_c_l {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 296 define void @gather4_c_l_v8() #0 { 297 main_body: 298 %r = call <4 x float> @llvm.SI.gather4.c.l.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 299 %r0 = extractelement <4 x float> %r, i32 0 300 %r1 = extractelement <4 x float> %r, i32 1 301 %r2 = extractelement <4 x float> %r, i32 2 302 %r3 = extractelement <4 x float> %r, i32 3 303 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 304 ret void 305 } 306 307 ;CHECK-LABEL: {{^}}gather4_c_b: 308 ;CHECK: image_gather4_c_b {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 309 define void @gather4_c_b() #0 { 310 main_body: 311 %r = call <4 x float> @llvm.SI.gather4.c.b.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 312 %r0 = extractelement <4 x float> %r, i32 0 313 %r1 = extractelement <4 x float> %r, i32 1 314 %r2 = extractelement <4 x float> %r, i32 2 315 %r3 = extractelement <4 x float> %r, i32 3 316 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 317 ret void 318 } 319 320 ;CHECK-LABEL: {{^}}gather4_c_b_v8: 321 ;CHECK: image_gather4_c_b {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 322 define void @gather4_c_b_v8() #0 { 323 main_body: 324 %r = call <4 x float> @llvm.SI.gather4.c.b.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 325 %r0 = extractelement <4 x float> %r, i32 0 326 %r1 = extractelement <4 x float> %r, i32 1 327 %r2 = extractelement <4 x float> %r, i32 2 328 %r3 = extractelement <4 x float> %r, i32 3 329 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 330 ret void 331 } 332 333 ;CHECK-LABEL: {{^}}gather4_c_b_cl: 334 ;CHECK: image_gather4_c_b_cl {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 335 define void @gather4_c_b_cl() #0 { 336 main_body: 337 %r = call <4 x float> @llvm.SI.gather4.c.b.cl.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 338 %r0 = extractelement <4 x float> %r, i32 0 339 %r1 = extractelement <4 x float> %r, i32 1 340 %r2 = extractelement <4 x float> %r, i32 2 341 %r3 = extractelement <4 x float> %r, i32 3 342 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 343 ret void 344 } 345 346 ;CHECK-LABEL: {{^}}gather4_c_lz: 347 ;CHECK: image_gather4_c_lz {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 348 define void @gather4_c_lz() #0 { 349 main_body: 350 %r = call <4 x float> @llvm.SI.gather4.c.lz.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 351 %r0 = extractelement <4 x float> %r, i32 0 352 %r1 = extractelement <4 x float> %r, i32 1 353 %r2 = extractelement <4 x float> %r, i32 2 354 %r3 = extractelement <4 x float> %r, i32 3 355 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 356 ret void 357 } 358 359 360 361 ;CHECK-LABEL: {{^}}gather4_c_o: 362 ;CHECK: image_gather4_c_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 363 define void @gather4_c_o() #0 { 364 main_body: 365 %r = call <4 x float> @llvm.SI.gather4.c.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 366 %r0 = extractelement <4 x float> %r, i32 0 367 %r1 = extractelement <4 x float> %r, i32 1 368 %r2 = extractelement <4 x float> %r, i32 2 369 %r3 = extractelement <4 x float> %r, i32 3 370 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 371 ret void 372 } 373 374 ;CHECK-LABEL: {{^}}gather4_c_o_v8: 375 ;CHECK: image_gather4_c_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 376 define void @gather4_c_o_v8() #0 { 377 main_body: 378 %r = call <4 x float> @llvm.SI.gather4.c.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 379 %r0 = extractelement <4 x float> %r, i32 0 380 %r1 = extractelement <4 x float> %r, i32 1 381 %r2 = extractelement <4 x float> %r, i32 2 382 %r3 = extractelement <4 x float> %r, i32 3 383 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 384 ret void 385 } 386 387 ;CHECK-LABEL: {{^}}gather4_c_cl_o: 388 ;CHECK: image_gather4_c_cl_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 389 define void @gather4_c_cl_o() #0 { 390 main_body: 391 %r = call <4 x float> @llvm.SI.gather4.c.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 392 %r0 = extractelement <4 x float> %r, i32 0 393 %r1 = extractelement <4 x float> %r, i32 1 394 %r2 = extractelement <4 x float> %r, i32 2 395 %r3 = extractelement <4 x float> %r, i32 3 396 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 397 ret void 398 } 399 400 ;CHECK-LABEL: {{^}}gather4_c_l_o: 401 ;CHECK: image_gather4_c_l_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 402 define void @gather4_c_l_o() #0 { 403 main_body: 404 %r = call <4 x float> @llvm.SI.gather4.c.l.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 405 %r0 = extractelement <4 x float> %r, i32 0 406 %r1 = extractelement <4 x float> %r, i32 1 407 %r2 = extractelement <4 x float> %r, i32 2 408 %r3 = extractelement <4 x float> %r, i32 3 409 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 410 ret void 411 } 412 413 ;CHECK-LABEL: {{^}}gather4_c_b_o: 414 ;CHECK: image_gather4_c_b_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 415 define void @gather4_c_b_o() #0 { 416 main_body: 417 %r = call <4 x float> @llvm.SI.gather4.c.b.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 418 %r0 = extractelement <4 x float> %r, i32 0 419 %r1 = extractelement <4 x float> %r, i32 1 420 %r2 = extractelement <4 x float> %r, i32 2 421 %r3 = extractelement <4 x float> %r, i32 3 422 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 423 ret void 424 } 425 426 ;CHECK-LABEL: {{^}}gather4_c_b_cl_o: 427 ;CHECK: image_gather4_c_b_cl_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 428 define void @gather4_c_b_cl_o() #0 { 429 main_body: 430 %r = call <4 x float> @llvm.SI.gather4.c.b.cl.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 431 %r0 = extractelement <4 x float> %r, i32 0 432 %r1 = extractelement <4 x float> %r, i32 1 433 %r2 = extractelement <4 x float> %r, i32 2 434 %r3 = extractelement <4 x float> %r, i32 3 435 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 436 ret void 437 } 438 439 ;CHECK-LABEL: {{^}}gather4_c_lz_o: 440 ;CHECK: image_gather4_c_lz_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 441 define void @gather4_c_lz_o() #0 { 442 main_body: 443 %r = call <4 x float> @llvm.SI.gather4.c.lz.o.v4i32(<4 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 444 %r0 = extractelement <4 x float> %r, i32 0 445 %r1 = extractelement <4 x float> %r, i32 1 446 %r2 = extractelement <4 x float> %r, i32 2 447 %r3 = extractelement <4 x float> %r, i32 3 448 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 449 ret void 450 } 451 452 ;CHECK-LABEL: {{^}}gather4_c_lz_o_v8: 453 ;CHECK: image_gather4_c_lz_o {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}} 454 define void @gather4_c_lz_o_v8() #0 { 455 main_body: 456 %r = call <4 x float> @llvm.SI.gather4.c.lz.o.v8i32(<8 x i32> undef, <32 x i8> undef, <16 x i8> undef, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0) 457 %r0 = extractelement <4 x float> %r, i32 0 458 %r1 = extractelement <4 x float> %r, i32 1 459 %r2 = extractelement <4 x float> %r, i32 2 460 %r3 = extractelement <4 x float> %r, i32 3 461 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3) 462 ret void 463 } 464 465 466 467 declare <4 x float> @llvm.SI.gather4.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 468 declare <4 x float> @llvm.SI.gather4.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 469 declare <4 x float> @llvm.SI.gather4.cl.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 470 declare <4 x float> @llvm.SI.gather4.l.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 471 declare <4 x float> @llvm.SI.gather4.b.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 472 declare <4 x float> @llvm.SI.gather4.b.cl.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 473 declare <4 x float> @llvm.SI.gather4.b.cl.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 474 declare <4 x float> @llvm.SI.gather4.lz.v2i32(<2 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 475 declare <4 x float> @llvm.SI.gather4.lz.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 476 477 declare <4 x float> @llvm.SI.gather4.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 478 declare <4 x float> @llvm.SI.gather4.cl.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 479 declare <4 x float> @llvm.SI.gather4.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 480 declare <4 x float> @llvm.SI.gather4.l.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 481 declare <4 x float> @llvm.SI.gather4.l.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 482 declare <4 x float> @llvm.SI.gather4.b.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 483 declare <4 x float> @llvm.SI.gather4.b.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 484 declare <4 x float> @llvm.SI.gather4.b.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 485 declare <4 x float> @llvm.SI.gather4.lz.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 486 487 declare <4 x float> @llvm.SI.gather4.c.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 488 declare <4 x float> @llvm.SI.gather4.c.cl.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 489 declare <4 x float> @llvm.SI.gather4.c.cl.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 490 declare <4 x float> @llvm.SI.gather4.c.l.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 491 declare <4 x float> @llvm.SI.gather4.c.l.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 492 declare <4 x float> @llvm.SI.gather4.c.b.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 493 declare <4 x float> @llvm.SI.gather4.c.b.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 494 declare <4 x float> @llvm.SI.gather4.c.b.cl.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 495 declare <4 x float> @llvm.SI.gather4.c.lz.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 496 497 declare <4 x float> @llvm.SI.gather4.c.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 498 declare <4 x float> @llvm.SI.gather4.c.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 499 declare <4 x float> @llvm.SI.gather4.c.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 500 declare <4 x float> @llvm.SI.gather4.c.l.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 501 declare <4 x float> @llvm.SI.gather4.c.b.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 502 declare <4 x float> @llvm.SI.gather4.c.b.cl.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 503 declare <4 x float> @llvm.SI.gather4.c.lz.o.v4i32(<4 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 504 declare <4 x float> @llvm.SI.gather4.c.lz.o.v8i32(<8 x i32>, <32 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #1 505 506 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 507 508 attributes #0 = { "ShaderType"="0" } 509 attributes #1 = { nounwind readnone } 510
