1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s 3 4 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, -1 5 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, 0 6 ; CHECK-DAG: image_get_resinfo {{v[0-9]+}}, 2, 0, 0, 0 7 ; CHECK-DAG: image_get_resinfo {{v[0-9]+}}, 1, 0, 0, 0 8 ; CHECK-DAG: image_get_resinfo {{v[0-9]+}}, 4, 0, 0, 0 9 ; CHECK-DAG: image_get_resinfo {{v[0-9]+}}, 8, 0, 0, 0 10 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 5, 0, 0, 0 11 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 9, 0, 0, 0 12 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 6, 0, 0, 0 13 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 10, 0, 0, -1 14 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 12, 0, 0, -1 15 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 7, 0, 0, 0 16 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 11, 0, 0, 0 17 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 13, 0, 0, 0 18 ; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 14, 0, 0, 0 19 ; CHECK-DAG: image_get_resinfo {{v[0-9]+}}, 8, 0, 0, -1 20 21 define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, 22 i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15, i32 %a16) { 23 %res1 = call <4 x i32> @llvm.SI.resinfo(i32 %a1, <32 x i8> undef, i32 1) 24 %res2 = call <4 x i32> @llvm.SI.resinfo(i32 %a2, <32 x i8> undef, i32 2) 25 %res3 = call <4 x i32> @llvm.SI.resinfo(i32 %a3, <32 x i8> undef, i32 3) 26 %res4 = call <4 x i32> @llvm.SI.resinfo(i32 %a4, <32 x i8> undef, i32 4) 27 %res5 = call <4 x i32> @llvm.SI.resinfo(i32 %a5, <32 x i8> undef, i32 5) 28 %res6 = call <4 x i32> @llvm.SI.resinfo(i32 %a6, <32 x i8> undef, i32 6) 29 %res7 = call <4 x i32> @llvm.SI.resinfo(i32 %a7, <32 x i8> undef, i32 7) 30 %res8 = call <4 x i32> @llvm.SI.resinfo(i32 %a8, <32 x i8> undef, i32 8) 31 %res9 = call <4 x i32> @llvm.SI.resinfo(i32 %a9, <32 x i8> undef, i32 9) 32 %res10 = call <4 x i32> @llvm.SI.resinfo(i32 %a10, <32 x i8> undef, i32 10) 33 %res11 = call <4 x i32> @llvm.SI.resinfo(i32 %a11, <32 x i8> undef, i32 11) 34 %res12 = call <4 x i32> @llvm.SI.resinfo(i32 %a12, <32 x i8> undef, i32 12) 35 %res13 = call <4 x i32> @llvm.SI.resinfo(i32 %a13, <32 x i8> undef, i32 13) 36 %res14 = call <4 x i32> @llvm.SI.resinfo(i32 %a14, <32 x i8> undef, i32 14) 37 %res15 = call <4 x i32> @llvm.SI.resinfo(i32 %a15, <32 x i8> undef, i32 15) 38 %res16 = call <4 x i32> @llvm.SI.resinfo(i32 %a16, <32 x i8> undef, i32 16) 39 %e1 = extractelement <4 x i32> %res1, i32 0 40 %e2 = extractelement <4 x i32> %res2, i32 1 41 %e3 = extractelement <4 x i32> %res3, i32 2 42 %e4 = extractelement <4 x i32> %res4, i32 3 43 %t0 = extractelement <4 x i32> %res5, i32 0 44 %t1 = extractelement <4 x i32> %res5, i32 1 45 %e5 = add i32 %t0, %t1 46 %t2 = extractelement <4 x i32> %res6, i32 0 47 %t3 = extractelement <4 x i32> %res6, i32 2 48 %e6 = add i32 %t2, %t3 49 %t4 = extractelement <4 x i32> %res7, i32 0 50 %t5 = extractelement <4 x i32> %res7, i32 3 51 %e7 = add i32 %t4, %t5 52 %t6 = extractelement <4 x i32> %res8, i32 1 53 %t7 = extractelement <4 x i32> %res8, i32 2 54 %e8 = add i32 %t6, %t7 55 %t8 = extractelement <4 x i32> %res9, i32 1 56 %t9 = extractelement <4 x i32> %res9, i32 3 57 %e9 = add i32 %t8, %t9 58 %t10 = extractelement <4 x i32> %res10, i32 2 59 %t11 = extractelement <4 x i32> %res10, i32 3 60 %e10 = add i32 %t10, %t11 61 %t12 = extractelement <4 x i32> %res11, i32 0 62 %t13 = extractelement <4 x i32> %res11, i32 1 63 %t14 = extractelement <4 x i32> %res11, i32 2 64 %t15 = add i32 %t12, %t13 65 %e11 = add i32 %t14, %t15 66 %t16 = extractelement <4 x i32> %res12, i32 0 67 %t17 = extractelement <4 x i32> %res12, i32 1 68 %t18 = extractelement <4 x i32> %res12, i32 3 69 %t19 = add i32 %t16, %t17 70 %e12 = add i32 %t18, %t19 71 %t20 = extractelement <4 x i32> %res13, i32 0 72 %t21 = extractelement <4 x i32> %res13, i32 2 73 %t22 = extractelement <4 x i32> %res13, i32 3 74 %t23 = add i32 %t20, %t21 75 %e13 = add i32 %t22, %t23 76 %t24 = extractelement <4 x i32> %res14, i32 1 77 %t25 = extractelement <4 x i32> %res14, i32 2 78 %t26 = extractelement <4 x i32> %res14, i32 3 79 %t27 = add i32 %t24, %t25 80 %e14 = add i32 %t26, %t27 81 %t28 = extractelement <4 x i32> %res15, i32 0 82 %t29 = extractelement <4 x i32> %res15, i32 1 83 %t30 = extractelement <4 x i32> %res15, i32 2 84 %t31 = extractelement <4 x i32> %res15, i32 3 85 %t32 = add i32 %t28, %t29 86 %t33 = add i32 %t30, %t31 87 %e15 = add i32 %t32, %t33 88 %e16 = extractelement <4 x i32> %res16, i32 3 89 %s1 = add i32 %e1, %e2 90 %s2 = add i32 %s1, %e3 91 %s3 = add i32 %s2, %e4 92 %s4 = add i32 %s3, %e5 93 %s5 = add i32 %s4, %e6 94 %s6 = add i32 %s5, %e7 95 %s7 = add i32 %s6, %e8 96 %s8 = add i32 %s7, %e9 97 %s9 = add i32 %s8, %e10 98 %s10 = add i32 %s9, %e11 99 %s11 = add i32 %s10, %e12 100 %s12 = add i32 %s11, %e13 101 %s13 = add i32 %s12, %e14 102 %s14 = add i32 %s13, %e15 103 %s15 = add i32 %s14, %e16 104 %s16 = bitcast i32 %s15 to float 105 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %s16, float %s16, float %s16, float %s16) 106 ret void 107 } 108 109 declare <4 x i32> @llvm.SI.resinfo(i32, <32 x i8>, i32) readnone 110 111 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 112
