1 ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck %s 2 ; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck %s 3 4 ; When a frame index offset is more than 12-bits, make sure we don't store 5 ; it in mubuf's offset field. 6 7 ; Also, make sure we use the same register for storing the scratch buffer addresss 8 ; for both stores. This register is allocated by the register scavenger, so we 9 ; should be able to reuse the same regiser for each scratch buffer access. 10 11 ; CHECK-LABEL: {{^}}legal_offset_fi: 12 ; CHECK: v_mov_b32_e32 [[OFFSET:v[0-9]+]], 0{{$}} 13 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen 14 ; CHECK: v_mov_b32_e32 [[OFFSET]], 0x8000 15 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}} 16 17 define void @legal_offset_fi(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) { 18 entry: 19 %scratch0 = alloca [8192 x i32] 20 %scratch1 = alloca [8192 x i32] 21 22 %scratchptr0 = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 0 23 store i32 1, i32* %scratchptr0 24 25 %scratchptr1 = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 0 26 store i32 2, i32* %scratchptr1 27 28 %cmp = icmp eq i32 %cond, 0 29 br i1 %cmp, label %if, label %else 30 31 if: 32 %if_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 %if_offset 33 %if_value = load i32, i32* %if_ptr 34 br label %done 35 36 else: 37 %else_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %else_offset 38 %else_value = load i32, i32* %else_ptr 39 br label %done 40 41 done: 42 %value = phi i32 [%if_value, %if], [%else_value, %else] 43 store i32 %value, i32 addrspace(1)* %out 44 ret void 45 46 ret void 47 48 } 49 50 ; CHECK-LABEL: {{^}}legal_offset_fi_offset 51 ; CHECK: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen 52 ; CHECK: v_add_i32_e32 [[OFFSET:v[0-9]+]], 0x8000 53 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}} 54 55 define void @legal_offset_fi_offset(i32 addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %offsets, i32 %if_offset, i32 %else_offset) { 56 entry: 57 %scratch0 = alloca [8192 x i32] 58 %scratch1 = alloca [8192 x i32] 59 60 %offset0 = load i32, i32 addrspace(1)* %offsets 61 %scratchptr0 = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 %offset0 62 store i32 %offset0, i32* %scratchptr0 63 64 %offsetptr1 = getelementptr i32, i32 addrspace(1)* %offsets, i32 1 65 %offset1 = load i32, i32 addrspace(1)* %offsetptr1 66 %scratchptr1 = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %offset1 67 store i32 %offset1, i32* %scratchptr1 68 69 %cmp = icmp eq i32 %cond, 0 70 br i1 %cmp, label %if, label %else 71 72 if: 73 %if_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch0, i32 0, i32 %if_offset 74 %if_value = load i32, i32* %if_ptr 75 br label %done 76 77 else: 78 %else_ptr = getelementptr [8192 x i32], [8192 x i32]* %scratch1, i32 0, i32 %else_offset 79 %else_value = load i32, i32* %else_ptr 80 br label %done 81 82 done: 83 %value = phi i32 [%if_value, %if], [%else_value, %else] 84 store i32 %value, i32 addrspace(1)* %out 85 ret void 86 } 87 88
