1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace %s 3 4 ; CHECK-LABEL: {{^}}main: 5 ; CHECK: s_load_dwordx4 6 ; CHECK: s_load_dwordx4 7 ; CHECK: s_waitcnt vmcnt(0) lgkmcnt(0){{$}} 8 ; CHECK: s_endpgm 9 define void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) #0 { 10 main_body: 11 %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 0 12 %tmp10 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0 13 %tmp11 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp10, i32 0, i32 %arg6) 14 %tmp12 = extractelement <4 x float> %tmp11, i32 0 15 %tmp13 = extractelement <4 x float> %tmp11, i32 1 16 call void @llvm.AMDGPU.barrier.global() #1 17 %tmp14 = extractelement <4 x float> %tmp11, i32 2 18 ; %tmp15 = extractelement <4 x float> %tmp11, i32 3 19 %tmp15 = load float, float addrspace(2)* %constptr, align 4 ; Force waiting for expcnt and lgkmcnt 20 %tmp16 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 1 21 %tmp17 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp16, !tbaa !0 22 %tmp18 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %tmp17, i32 0, i32 %arg6) 23 %tmp19 = extractelement <4 x float> %tmp18, i32 0 24 %tmp20 = extractelement <4 x float> %tmp18, i32 1 25 %tmp21 = extractelement <4 x float> %tmp18, i32 2 26 %tmp22 = extractelement <4 x float> %tmp18, i32 3 27 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %tmp19, float %tmp20, float %tmp21, float %tmp22) 28 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %tmp12, float %tmp13, float %tmp14, float %tmp15) 29 ret void 30 } 31 32 ; Function Attrs: noduplicate nounwind 33 declare void @llvm.AMDGPU.barrier.global() #1 34 35 ; Function Attrs: nounwind readnone 36 declare <4 x float> @llvm.SI.vs.load.input(<16 x i8>, i32, i32) #2 37 38 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 39 40 attributes #0 = { "ShaderType"="1" } 41 attributes #1 = { noduplicate nounwind } 42 attributes #2 = { nounwind readnone } 43 44 !0 = !{!1, !1, i64 0, i32 1} 45 !1 = !{!"const", null} 46
