1 ; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s 2 3 ; Test #<const> 4 5 ; var 2.1 - 0x00ab00ab 6 define i32 @t2_const_var2_1_ok_1(i32 %lhs) { 7 ;CHECK-LABEL: t2_const_var2_1_ok_1: 8 ;CHECK: add.w r0, r0, #11206827 9 %ret = add i32 %lhs, 11206827 ; 0x00ab00ab 10 ret i32 %ret 11 } 12 13 define i32 @t2_const_var2_1_ok_2(i32 %lhs) { 14 ;CHECK-LABEL: t2_const_var2_1_ok_2: 15 ;CHECK: add.w r0, r0, #11206656 16 ;CHECK: adds r0, #187 17 %ret = add i32 %lhs, 11206843 ; 0x00ab00bb 18 ret i32 %ret 19 } 20 21 define i32 @t2_const_var2_1_ok_3(i32 %lhs) { 22 ;CHECK-LABEL: t2_const_var2_1_ok_3: 23 ;CHECK: add.w r0, r0, #11206827 24 ;CHECK: add.w r0, r0, #16777216 25 %ret = add i32 %lhs, 27984043 ; 0x01ab00ab 26 ret i32 %ret 27 } 28 29 define i32 @t2_const_var2_1_ok_4(i32 %lhs) { 30 ;CHECK-LABEL: t2_const_var2_1_ok_4: 31 ;CHECK: add.w r0, r0, #16777472 32 ;CHECK: add.w r0, r0, #11206827 33 %ret = add i32 %lhs, 27984299 ; 0x01ab01ab 34 ret i32 %ret 35 } 36 37 define i32 @t2_const_var2_1_fail_1(i32 %lhs) { 38 ;CHECK-LABEL: t2_const_var2_1_fail_1: 39 ;CHECK: movw r1, #43777 40 ;CHECK: movt r1, #427 41 ;CHECK: add r0, r1 42 %ret = add i32 %lhs, 28027649 ; 0x01abab01 43 ret i32 %ret 44 } 45 46 ; var 2.2 - 0xab00ab00 47 define i32 @t2_const_var2_2_ok_1(i32 %lhs) { 48 ;CHECK-LABEL: t2_const_var2_2_ok_1: 49 ;CHECK: add.w r0, r0, #-1426019584 50 %ret = add i32 %lhs, 2868947712 ; 0xab00ab00 51 ret i32 %ret 52 } 53 54 define i32 @t2_const_var2_2_ok_2(i32 %lhs) { 55 ;CHECK-LABEL: t2_const_var2_2_ok_2: 56 ;CHECK: add.w r0, r0, #2868903936 57 ;CHECK: add.w r0, r0, #47616 58 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00 59 ret i32 %ret 60 } 61 62 define i32 @t2_const_var2_2_ok_3(i32 %lhs) { 63 ;CHECK-LABEL: t2_const_var2_2_ok_3: 64 ;CHECK: add.w r0, r0, #2868947712 65 ;CHECK: adds r0, #16 66 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10 67 ret i32 %ret 68 } 69 70 define i32 @t2_const_var2_2_ok_4(i32 %lhs) { 71 ;CHECK-LABEL: t2_const_var2_2_ok_4: 72 ;CHECK: add.w r0, r0, #2868947712 73 ;CHECK: add.w r0, r0, #1048592 74 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10 75 ret i32 %ret 76 } 77 78 define i32 @t2_const_var2_2_fail_1(i32 %lhs) { 79 ;CHECK-LABEL: t2_const_var2_2_fail_1: 80 ;CHECK: movw r1, #43792 81 ;CHECK: movt r1, #4267 82 ;CHECK: add r0, r1 83 %ret = add i32 %lhs, 279685904 ; 0x10abab10 84 ret i32 %ret 85 } 86 87 ; var 2.3 - 0xabababab 88 define i32 @t2_const_var2_3_ok_1(i32 %lhs) { 89 ;CHECK-LABEL: t2_const_var2_3_ok_1: 90 ;CHECK: add.w r0, r0, #-1414812757 91 %ret = add i32 %lhs, 2880154539 ; 0xabababab 92 ret i32 %ret 93 } 94 95 define i32 @t2_const_var2_3_fail_1(i32 %lhs) { 96 ;CHECK-LABEL: t2_const_var2_3_fail_1: 97 ;CHECK: movw r1, #43962 98 ;CHECK: movt r1, #43947 99 ;CHECK: add r0, r1 100 %ret = add i32 %lhs, 2880154554 ; 0xabababba 101 ret i32 %ret 102 } 103 104 define i32 @t2_const_var2_3_fail_2(i32 %lhs) { 105 ;CHECK-LABEL: t2_const_var2_3_fail_2: 106 ;CHECK: movw r1, #47787 107 ;CHECK: movt r1, #43947 108 ;CHECK: add r0, r1 109 %ret = add i32 %lhs, 2880158379 ; 0xababbaab 110 ret i32 %ret 111 } 112 113 define i32 @t2_const_var2_3_fail_3(i32 %lhs) { 114 ;CHECK-LABEL: t2_const_var2_3_fail_3: 115 ;CHECK: movw r1, #43947 116 ;CHECK: movt r1, #43962 117 ;CHECK: add r0, r1 118 %ret = add i32 %lhs, 2881137579 ; 0xabbaabab 119 ret i32 %ret 120 } 121 122 define i32 @t2_const_var2_3_fail_4(i32 %lhs) { 123 ;CHECK-LABEL: t2_const_var2_3_fail_4: 124 ;CHECK: movw r1, #43947 125 ;CHECK: movt r1, #47787 126 ;CHECK: add r0, r1 127 %ret = add i32 %lhs, 3131812779 ; 0xbaababab 128 ret i32 %ret 129 } 130 131 ; var 3 - 0x0F000000 132 define i32 @t2_const_var3_1_ok_1(i32 %lhs) { 133 ;CHECK-LABEL: t2_const_var3_1_ok_1: 134 ;CHECK: add.w r0, r0, #251658240 135 %ret = add i32 %lhs, 251658240 ; 0x0F000000 136 ret i32 %ret 137 } 138 139 define i32 @t2_const_var3_2_ok_1(i32 %lhs) { 140 ;CHECK-LABEL: t2_const_var3_2_ok_1: 141 ;CHECK: add.w r0, r0, #3948544 142 %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000 143 ret i32 %ret 144 } 145 146 define i32 @t2_const_var3_2_ok_2(i32 %lhs) { 147 ;CHECK-LABEL: t2_const_var3_2_ok_2: 148 ;CHECK: add.w r0, r0, #2097152 149 ;CHECK: add.w r0, r0, #1843200 150 %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000 151 ret i32 %ret 152 } 153 154 define i32 @t2_const_var3_3_ok_1(i32 %lhs) { 155 ;CHECK-LABEL: t2_const_var3_3_ok_1: 156 ;CHECK: add.w r0, r0, #258 157 %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010 158 ret i32 %ret 159 } 160 161 define i32 @t2_const_var3_4_ok_1(i32 %lhs) { 162 ;CHECK-LABEL: t2_const_var3_4_ok_1: 163 ;CHECK: add.w r0, r0, #-268435456 164 %ret = add i32 %lhs, 4026531840 ; 0xF0000000 165 ret i32 %ret 166 } 167 168 define i32 @t2MOVTi16_ok_1(i32 %a) { 169 ; CHECK-LABEL: t2MOVTi16_ok_1: 170 ; CHECK: movt r0, #1234 171 %1 = and i32 %a, 65535 172 %2 = shl i32 1234, 16 173 %3 = or i32 %1, %2 174 175 ret i32 %3 176 } 177 178 define i32 @t2MOVTi16_test_1(i32 %a) { 179 ; CHECK-LABEL: t2MOVTi16_test_1: 180 ; CHECK: movt r0, #1234 181 %1 = shl i32 255, 8 182 %2 = shl i32 1234, 8 183 %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3 184 %4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4 185 %5 = and i32 %a, %3 186 %6 = or i32 %4, %5 187 188 ret i32 %6 189 } 190 191 define i32 @t2MOVTi16_test_2(i32 %a) { 192 ; CHECK-LABEL: t2MOVTi16_test_2: 193 ; CHECK: movt r0, #1234 194 %1 = shl i32 255, 8 195 %2 = shl i32 1234, 8 196 %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3 197 %4 = shl i32 %2, 6 198 %5 = and i32 %a, %3 199 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6 200 %7 = or i32 %5, %6 201 202 ret i32 %7 203 } 204 205 define i32 @t2MOVTi16_test_3(i32 %a) { 206 ; CHECK-LABEL: t2MOVTi16_test_3: 207 ; CHECK: movt r0, #1234 208 %1 = shl i32 255, 8 209 %2 = shl i32 1234, 8 210 %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3 211 %4 = shl i32 %2, 6 212 %5 = and i32 %a, %3 213 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6 214 %7 = lshr i32 %6, 6 215 %8 = shl i32 %7, 6 216 %9 = or i32 %5, %8 217 218 ret i32 %8 219 } 220 221 ; 171 = 0x000000ab 222 define i32 @f1(i32 %a) { 223 ; CHECK-LABEL: f1: 224 ; CHECK: movs r0, #171 225 %tmp = add i32 0, 171 226 ret i32 %tmp 227 } 228 229 ; 1179666 = 0x00120012 230 define i32 @f2(i32 %a) { 231 ; CHECK-LABEL: f2: 232 ; CHECK: mov.w r0, #1179666 233 %tmp = add i32 0, 1179666 234 ret i32 %tmp 235 } 236 237 ; 872428544 = 0x34003400 238 define i32 @f3(i32 %a) { 239 ; CHECK-LABEL: f3: 240 ; CHECK: mov.w r0, #872428544 241 %tmp = add i32 0, 872428544 242 ret i32 %tmp 243 } 244 245 ; 1448498774 = 0x56565656 246 define i32 @f4(i32 %a) { 247 ; CHECK-LABEL: f4: 248 ; CHECK: mov.w r0, #1448498774 249 %tmp = add i32 0, 1448498774 250 ret i32 %tmp 251 } 252 253 ; 66846720 = 0x03fc0000 254 define i32 @f5(i32 %a) { 255 ; CHECK-LABEL: f5: 256 ; CHECK: mov.w r0, #66846720 257 %tmp = add i32 0, 66846720 258 ret i32 %tmp 259 } 260 261 define i32 @f6(i32 %a) { 262 ;CHECK-LABEL: f6: 263 ;CHECK: movw r0, #65535 264 %tmp = add i32 0, 65535 265 ret i32 %tmp 266 } 267
