1 ;RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s 2 3 ;CHECK-LABEL: shift_16_i32 4 ;CHECK: vpsrld 5 ;CHECK: vpslld 6 ;CHECK: vpsrad 7 ;CHECK: ret 8 define <16 x i32> @shift_16_i32(<16 x i32> %a) { 9 %b = lshr <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 10 %c = shl <16 x i32> %b, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> 11 %d = ashr <16 x i32> %c, <i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12> 12 ret <16 x i32> %d; 13 } 14 15 ;CHECK-LABEL: shift_8_i64 16 ;CHECK: vpsrlq 17 ;CHECK: vpsllq 18 ;CHECK: vpsraq 19 ;CHECK: ret 20 define <8 x i64> @shift_8_i64(<8 x i64> %a) { 21 %b = lshr <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1> 22 %c = shl <8 x i64> %b, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12> 23 %d = ashr <8 x i64> %c, <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12> 24 ret <8 x i64> %d; 25 } 26 27 ; CHECK-LABEL: variable_shl4 28 ; CHECK: vpsllvq %zmm 29 ; CHECK: ret 30 define <8 x i64> @variable_shl4(<8 x i64> %x, <8 x i64> %y) { 31 %k = shl <8 x i64> %x, %y 32 ret <8 x i64> %k 33 } 34 35 ; CHECK-LABEL: variable_shl5 36 ; CHECK: vpsllvd %zmm 37 ; CHECK: ret 38 define <16 x i32> @variable_shl5(<16 x i32> %x, <16 x i32> %y) { 39 %k = shl <16 x i32> %x, %y 40 ret <16 x i32> %k 41 } 42 43 ; CHECK-LABEL: variable_srl0 44 ; CHECK: vpsrlvd 45 ; CHECK: ret 46 define <16 x i32> @variable_srl0(<16 x i32> %x, <16 x i32> %y) { 47 %k = lshr <16 x i32> %x, %y 48 ret <16 x i32> %k 49 } 50 51 ; CHECK-LABEL: variable_srl2 52 ; CHECK: psrlvq 53 ; CHECK: ret 54 define <8 x i64> @variable_srl2(<8 x i64> %x, <8 x i64> %y) { 55 %k = lshr <8 x i64> %x, %y 56 ret <8 x i64> %k 57 } 58 59 ; CHECK-LABEL: variable_sra1 60 ; CHECK: vpsravd 61 ; CHECK: ret 62 define <16 x i32> @variable_sra1(<16 x i32> %x, <16 x i32> %y) { 63 %k = ashr <16 x i32> %x, %y 64 ret <16 x i32> %k 65 } 66 67 ; CHECK-LABEL: variable_sra2 68 ; CHECK: vpsravq %zmm 69 ; CHECK: ret 70 define <8 x i64> @variable_sra2(<8 x i64> %x, <8 x i64> %y) { 71 %k = ashr <8 x i64> %x, %y 72 ret <8 x i64> %k 73 } 74 75 ; CHECK-LABEL: variable_sra01_load 76 ; CHECK: vpsravd (% 77 ; CHECK: ret 78 define <16 x i32> @variable_sra01_load(<16 x i32> %x, <16 x i32>* %y) { 79 %y1 = load <16 x i32>, <16 x i32>* %y 80 %k = ashr <16 x i32> %x, %y1 81 ret <16 x i32> %k 82 } 83 84 ; CHECK-LABEL: variable_shl1_load 85 ; CHECK: vpsllvd (% 86 ; CHECK: ret 87 define <16 x i32> @variable_shl1_load(<16 x i32> %x, <16 x i32>* %y) { 88 %y1 = load <16 x i32>, <16 x i32>* %y 89 %k = shl <16 x i32> %x, %y1 90 ret <16 x i32> %k 91 } 92 ; CHECK: variable_srl0_load 93 ; CHECK: vpsrlvd (% 94 ; CHECK: ret 95 define <16 x i32> @variable_srl0_load(<16 x i32> %x, <16 x i32>* %y) { 96 %y1 = load <16 x i32>, <16 x i32>* %y 97 %k = lshr <16 x i32> %x, %y1 98 ret <16 x i32> %k 99 } 100 101 ; CHECK: variable_srl3_load 102 ; CHECK: vpsrlvq (% 103 ; CHECK: ret 104 define <8 x i64> @variable_srl3_load(<8 x i64> %x, <8 x i64>* %y) { 105 %y1 = load <8 x i64>, <8 x i64>* %y 106 %k = lshr <8 x i64> %x, %y1 107 ret <8 x i64> %k 108 } 109
