1 ; RUN: llc < %s -mtriple=x86_64-pc-win32 -O0 -mattr=+avx | FileCheck %s 2 3 ; Background: 4 ; If fast-isel bails out to normal selection, then the DAG combiner will run, 5 ; even at -O0. In principle this should not happen (those are optimizations, 6 ; and we said -O0) but as a practical matter there are some instruction 7 ; selection patterns that depend on the legalizations and transforms that the 8 ; DAG combiner does. 9 ; 10 ; The 'optnone' attribute implicitly sets -O0 and fast-isel for the function. 11 ; The DAG combiner was disabled for 'optnone' (but not -O0) by r221168, then 12 ; re-enabled in r233153 because of problems with instruction selection patterns 13 ; mentioned above. (Note: because 'optnone' is supposed to match -O0, r221168 14 ; really should have disabled the combiner for both.) 15 ; 16 ; If instruction selection eventually becomes smart enough to run without DAG 17 ; combiner, then the combiner can be turned off for -O0 (not just 'optnone') 18 ; and this test can go away. (To be replaced by a different test that verifies 19 ; the DAG combiner does *not* run at -O0 or for 'optnone' functions.) 20 ; 21 ; In the meantime, this test wants to make sure the combiner stays enabled for 22 ; 'optnone' functions, just as it is for -O0. 23 24 25 ; The test cases @foo[WithOptnone] prove that the same DAG combine happens 26 ; with -O0 and with 'optnone' set. To prove this, we use a Windows triple to 27 ; cause fast-isel to bail out (because something about the calling convention 28 ; is not handled in fast-isel). Then we have a repeated fadd that can be 29 ; combined into an fmul. We show that this happens in both the non-optnone 30 ; function and the optnone function. 31 32 define float @foo(float %x) #0 { 33 entry: 34 %add = fadd fast float %x, %x 35 %add1 = fadd fast float %add, %x 36 ret float %add1 37 } 38 39 ; CHECK-LABEL: @foo 40 ; CHECK-NOT: add 41 ; CHECK: mul 42 ; CHECK-NEXT: ret 43 44 define float @fooWithOptnone(float %x) #1 { 45 entry: 46 %add = fadd fast float %x, %x 47 %add1 = fadd fast float %add, %x 48 ret float %add1 49 } 50 51 ; CHECK-LABEL: @fooWithOptnone 52 ; CHECK-NOT: add 53 ; CHECK: mul 54 ; CHECK-NEXT: ret 55 56 57 ; The test case @bar is derived from an instruction selection failure case 58 ; that was solved by r233153. It depends on -mattr=+avx. 59 ; Really all we're trying to prove is that it doesn't crash any more. 60 61 @id84 = common global <16 x i32> zeroinitializer, align 64 62 63 define void @bar() #1 { 64 entry: 65 %id83 = alloca <16 x i8>, align 16 66 %0 = load <16 x i32>, <16 x i32>* @id84, align 64 67 %conv = trunc <16 x i32> %0 to <16 x i8> 68 store <16 x i8> %conv, <16 x i8>* %id83, align 16 69 ret void 70 } 71 72 attributes #0 = { "unsafe-fp-math"="true" } 73 attributes #1 = { noinline optnone "unsafe-fp-math"="true" } 74
