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      1 ; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=atom | FileCheck %s
      2 ; <rdar://problem/8006248>
      3 
      4 ; This randomly started passing after an unrelated change, if it fails again it
      5 ; might be worth looking at PR12324: misched bringup.
      6 
      7 @llvm.used = appending global [1 x i8*] [i8* bitcast (void ([40 x i16]*, i32*, i16**, i64*)* @func to i8*)], section "llvm.metadata"
      8 
      9 define void @func([40 x i16]* %a, i32* %b, i16** %c, i64* %d) nounwind {
     10 entry:
     11   %tmp103 = getelementptr inbounds [40 x i16], [40 x i16]* %a, i64 0, i64 4
     12   %tmp104 = load i16, i16* %tmp103, align 2
     13   %tmp105 = sext i16 %tmp104 to i32
     14   %tmp106 = load i32, i32* %b, align 4
     15   %tmp107 = sub nsw i32 4, %tmp106
     16   %tmp108 = load i16*, i16** %c, align 8
     17   %tmp109 = sext i32 %tmp107 to i64
     18   %tmp110 = getelementptr inbounds i16, i16* %tmp108, i64 %tmp109
     19   %tmp111 = load i16, i16* %tmp110, align 1
     20   %tmp112 = sext i16 %tmp111 to i32
     21   %tmp = mul i32 355244649, %tmp112
     22   %tmp1 = mul i32 %tmp, %tmp105
     23   %tmp2 = add i32 %tmp1, 2138875574
     24   %tmp3 = add i32 %tmp2, 1546991088
     25   %tmp4 = mul i32 %tmp3, 2122487257
     26   %tmp5 = icmp sge i32 %tmp4, 2138875574
     27   %tmp6 = icmp slt i32 %tmp4, -8608074
     28   %tmp7 = or i1 %tmp5, %tmp6
     29   %outSign = select i1 %tmp7, i32 1, i32 -1
     30   %tmp8 = icmp slt i32 %tmp4, 0
     31   %tmp9 = icmp eq i32 %outSign, 1
     32   %tmp10 = and i1 %tmp8, %tmp9
     33   %tmp11 = sext i32 %tmp4 to i64
     34   %tmp12 = add i64 %tmp11, 5089792279245435153
     35 
     36 ; CHECK:      addl	$2138875574, %e[[REGISTER_zext:[a-z0-9]+]]
     37 ; CHECK:      cmpl	$-8608074, %e[[REGISTER_zext]]
     38 ; CHECK:      movslq	%e[[REGISTER_zext]], [[REGISTER_sext:%r[a-z0-9]+]]
     39 ; CHECK-NOT:  [[REGISTER_zext]]
     40 ; CHECK-DAG:  cmpl	$2138875573, %e[[REGISTER_zext]]
     41 ; CHECK:      movq  [[REGISTER_sext]], [[REGISTER_sext2:%[a-z0-9]+]]
     42 ; CHECK:      subq	%r[[REGISTER_zext]], [[REGISTER_sext2]]
     43 
     44   %tmp13 = sub i64 %tmp12, 2138875574
     45   %tmp14 = zext i32 %tmp4 to i64
     46   %tmp15 = sub i64 %tmp11, %tmp14
     47   %tmp16 = select i1 %tmp10, i64 %tmp15, i64 0
     48   %tmp17 = sub i64 %tmp13, %tmp16
     49   %tmp18 = mul i64 %tmp17, 4540133155013554595
     50   %tmp19 = sub i64 %tmp18, 5386586244038704851
     51   %tmp20 = add i64 %tmp19, -1368057358110947217
     52   %tmp21 = mul i64 %tmp20, -422037402840850817
     53   %tmp115 = load i64, i64* %d, align 8
     54   %alphaX = mul i64 468858157810230901, %tmp21
     55   %alphaXbetaY = add i64 %alphaX, %tmp115
     56   %transformed = add i64 %alphaXbetaY, 9040145182981852475
     57   store i64 %transformed, i64* %d, align 8
     58   ret void
     59 }
     60