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      1 ; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
      2 
      3 foo:
      4 ;==---------------------------------------------------------------------------==
      5 ; 5.4.2 Logical (immediate)
      6 ;==---------------------------------------------------------------------------==
      7 
      8   and   w0, w0, #1
      9   and   x0, x0, #1
     10   and   w1, w2, #15
     11   and   x1, x2, #15
     12   and   sp, x5, #~15
     13   ands  w0, w0, #1
     14   ands  x0, x0, #1
     15   ands  w1, w2, #15
     16   ands  x1, x2, #15
     17 
     18 ; CHECK: and  w0, w0, #0x1           ; encoding: [0x00,0x00,0x00,0x12]
     19 ; CHECK: and  x0, x0, #0x1           ; encoding: [0x00,0x00,0x40,0x92]
     20 ; CHECK: and  w1, w2, #0xf           ; encoding: [0x41,0x0c,0x00,0x12]
     21 ; CHECK: and  x1, x2, #0xf           ; encoding: [0x41,0x0c,0x40,0x92]
     22 ; CHECK: and  sp, x5, #0xfffffffffffffff0 ; encoding: [0xbf,0xec,0x7c,0x92]
     23 ; CHECK: ands w0, w0, #0x1           ; encoding: [0x00,0x00,0x00,0x72]
     24 ; CHECK: ands x0, x0, #0x1           ; encoding: [0x00,0x00,0x40,0xf2]
     25 ; CHECK: ands w1, w2, #0xf           ; encoding: [0x41,0x0c,0x00,0x72]
     26 ; CHECK: ands x1, x2, #0xf           ; encoding: [0x41,0x0c,0x40,0xf2]
     27 
     28   eor w1, w2, #0x4000
     29   eor x1, x2, #0x8000
     30 
     31 ; CHECK: eor w1, w2, #0x4000         ; encoding: [0x41,0x00,0x12,0x52]
     32 ; CHECK: eor x1, x2, #0x8000         ; encoding: [0x41,0x00,0x71,0xd2]
     33 
     34   orr w1, w2, #0x4000
     35   orr x1, x2, #0x8000
     36 
     37 ; CHECK: orr w1, w2, #0x4000         ; encoding: [0x41,0x00,0x12,0x32]
     38 ; CHECK: orr x1, x2, #0x8000         ; encoding: [0x41,0x00,0x71,0xb2]
     39 
     40   orr w8, wzr, #0x1
     41   orr x8, xzr, #0x1
     42 
     43 ; CHECK: orr w8, wzr, #0x1           ; encoding: [0xe8,0x03,0x00,0x32]
     44 ; CHECK: orr x8, xzr, #0x1           ; encoding: [0xe8,0x03,0x40,0xb2]
     45 
     46 ;==---------------------------------------------------------------------------==
     47 ; 5.5.3 Logical (shifted register)
     48 ;==---------------------------------------------------------------------------==
     49 
     50   and   w1, w2, w3
     51   and   x1, x2, x3
     52   and   w1, w2, w3, lsl #2
     53   and   x1, x2, x3, lsl #2
     54   and   w1, w2, w3, lsr #2
     55   and   x1, x2, x3, lsr #2
     56   and   w1, w2, w3, asr #2
     57   and   x1, x2, x3, asr #2
     58   and   w1, w2, w3, ror #2
     59   and   x1, x2, x3, ror #2
     60 
     61 ; CHECK: and  w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x0a]
     62 ; CHECK: and  x1, x2, x3             ; encoding: [0x41,0x00,0x03,0x8a]
     63 ; CHECK: and  w1, w2, w3, lsl #2     ; encoding: [0x41,0x08,0x03,0x0a]
     64 ; CHECK: and  x1, x2, x3, lsl #2     ; encoding: [0x41,0x08,0x03,0x8a]
     65 ; CHECK: and  w1, w2, w3, lsr #2     ; encoding: [0x41,0x08,0x43,0x0a]
     66 ; CHECK: and  x1, x2, x3, lsr #2     ; encoding: [0x41,0x08,0x43,0x8a]
     67 ; CHECK: and  w1, w2, w3, asr #2     ; encoding: [0x41,0x08,0x83,0x0a]
     68 ; CHECK: and  x1, x2, x3, asr #2     ; encoding: [0x41,0x08,0x83,0x8a]
     69 ; CHECK: and  w1, w2, w3, ror #2     ; encoding: [0x41,0x08,0xc3,0x0a]
     70 ; CHECK: and  x1, x2, x3, ror #2     ; encoding: [0x41,0x08,0xc3,0x8a]
     71 
     72   ands  w1, w2, w3
     73   ands  x1, x2, x3
     74   ands  w1, w2, w3, lsl #2
     75   ands  x1, x2, x3, lsl #2
     76   ands  w1, w2, w3, lsr #2
     77   ands  x1, x2, x3, lsr #2
     78   ands  w1, w2, w3, asr #2
     79   ands  x1, x2, x3, asr #2
     80   ands  w1, w2, w3, ror #2
     81   ands  x1, x2, x3, ror #2
     82 
     83 ; CHECK: ands w1, w2, w3             ; encoding: [0x41,0x00,0x03,0x6a]
     84 ; CHECK: ands x1, x2, x3             ; encoding: [0x41,0x00,0x03,0xea]
     85 ; CHECK: ands w1, w2, w3, lsl #2     ; encoding: [0x41,0x08,0x03,0x6a]
     86 ; CHECK: ands x1, x2, x3, lsl #2     ; encoding: [0x41,0x08,0x03,0xea]
     87 ; CHECK: ands w1, w2, w3, lsr #2     ; encoding: [0x41,0x08,0x43,0x6a]
     88 ; CHECK: ands x1, x2, x3, lsr #2     ; encoding: [0x41,0x08,0x43,0xea]
     89 ; CHECK: ands w1, w2, w3, asr #2     ; encoding: [0x41,0x08,0x83,0x6a]
     90 ; CHECK: ands x1, x2, x3, asr #2     ; encoding: [0x41,0x08,0x83,0xea]
     91 ; CHECK: ands w1, w2, w3, ror #2     ; encoding: [0x41,0x08,0xc3,0x6a]
     92 ; CHECK: ands x1, x2, x3, ror #2     ; encoding: [0x41,0x08,0xc3,0xea]
     93 
     94   bic w1, w2, w3
     95   bic x1, x2, x3
     96   bic w1, w2, w3, lsl #3
     97   bic x1, x2, x3, lsl #3
     98   bic w1, w2, w3, lsr #3
     99   bic x1, x2, x3, lsr #3
    100   bic w1, w2, w3, asr #3
    101   bic x1, x2, x3, asr #3
    102   bic w1, w2, w3, ror #3
    103   bic x1, x2, x3, ror #3
    104 
    105 ; CHECK: bic w1, w2, w3              ; encoding: [0x41,0x00,0x23,0x0a]
    106 ; CHECK: bic x1, x2, x3              ; encoding: [0x41,0x00,0x23,0x8a]
    107 ; CHECK: bic w1, w2, w3, lsl #3      ; encoding: [0x41,0x0c,0x23,0x0a]
    108 ; CHECK: bic x1, x2, x3, lsl #3      ; encoding: [0x41,0x0c,0x23,0x8a]
    109 ; CHECK: bic w1, w2, w3, lsr #3      ; encoding: [0x41,0x0c,0x63,0x0a]
    110 ; CHECK: bic x1, x2, x3, lsr #3      ; encoding: [0x41,0x0c,0x63,0x8a]
    111 ; CHECK: bic w1, w2, w3, asr #3      ; encoding: [0x41,0x0c,0xa3,0x0a]
    112 ; CHECK: bic x1, x2, x3, asr #3      ; encoding: [0x41,0x0c,0xa3,0x8a]
    113 ; CHECK: bic w1, w2, w3, ror #3      ; encoding: [0x41,0x0c,0xe3,0x0a]
    114 ; CHECK: bic x1, x2, x3, ror #3      ; encoding: [0x41,0x0c,0xe3,0x8a]
    115 
    116   bics w1, w2, w3
    117   bics x1, x2, x3
    118   bics w1, w2, w3, lsl #3
    119   bics x1, x2, x3, lsl #3
    120   bics w1, w2, w3, lsr #3
    121   bics x1, x2, x3, lsr #3
    122   bics w1, w2, w3, asr #3
    123   bics x1, x2, x3, asr #3
    124   bics w1, w2, w3, ror #3
    125   bics x1, x2, x3, ror #3
    126 
    127 ; CHECK: bics w1, w2, w3             ; encoding: [0x41,0x00,0x23,0x6a]
    128 ; CHECK: bics x1, x2, x3             ; encoding: [0x41,0x00,0x23,0xea]
    129 ; CHECK: bics w1, w2, w3, lsl #3     ; encoding: [0x41,0x0c,0x23,0x6a]
    130 ; CHECK: bics x1, x2, x3, lsl #3     ; encoding: [0x41,0x0c,0x23,0xea]
    131 ; CHECK: bics w1, w2, w3, lsr #3     ; encoding: [0x41,0x0c,0x63,0x6a]
    132 ; CHECK: bics x1, x2, x3, lsr #3     ; encoding: [0x41,0x0c,0x63,0xea]
    133 ; CHECK: bics w1, w2, w3, asr #3     ; encoding: [0x41,0x0c,0xa3,0x6a]
    134 ; CHECK: bics x1, x2, x3, asr #3     ; encoding: [0x41,0x0c,0xa3,0xea]
    135 ; CHECK: bics w1, w2, w3, ror #3     ; encoding: [0x41,0x0c,0xe3,0x6a]
    136 ; CHECK: bics x1, x2, x3, ror #3     ; encoding: [0x41,0x0c,0xe3,0xea]
    137 
    138   eon w1, w2, w3
    139   eon x1, x2, x3
    140   eon w1, w2, w3, lsl #4
    141   eon x1, x2, x3, lsl #4
    142   eon w1, w2, w3, lsr #4
    143   eon x1, x2, x3, lsr #4
    144   eon w1, w2, w3, asr #4
    145   eon x1, x2, x3, asr #4
    146   eon w1, w2, w3, ror #4
    147   eon x1, x2, x3, ror #4
    148 
    149 ; CHECK: eon w1, w2, w3              ; encoding: [0x41,0x00,0x23,0x4a]
    150 ; CHECK: eon x1, x2, x3              ; encoding: [0x41,0x00,0x23,0xca]
    151 ; CHECK: eon w1, w2, w3, lsl #4      ; encoding: [0x41,0x10,0x23,0x4a]
    152 ; CHECK: eon x1, x2, x3, lsl #4      ; encoding: [0x41,0x10,0x23,0xca]
    153 ; CHECK: eon w1, w2, w3, lsr #4      ; encoding: [0x41,0x10,0x63,0x4a]
    154 ; CHECK: eon x1, x2, x3, lsr #4      ; encoding: [0x41,0x10,0x63,0xca]
    155 ; CHECK: eon w1, w2, w3, asr #4      ; encoding: [0x41,0x10,0xa3,0x4a]
    156 ; CHECK: eon x1, x2, x3, asr #4      ; encoding: [0x41,0x10,0xa3,0xca]
    157 ; CHECK: eon w1, w2, w3, ror #4      ; encoding: [0x41,0x10,0xe3,0x4a]
    158 ; CHECK: eon x1, x2, x3, ror #4      ; encoding: [0x41,0x10,0xe3,0xca]
    159 
    160   eor w1, w2, w3
    161   eor x1, x2, x3
    162   eor w1, w2, w3, lsl #5
    163   eor x1, x2, x3, lsl #5
    164   eor w1, w2, w3, lsr #5
    165   eor x1, x2, x3, lsr #5
    166   eor w1, w2, w3, asr #5
    167   eor x1, x2, x3, asr #5
    168   eor w1, w2, w3, ror #5
    169   eor x1, x2, x3, ror #5
    170 
    171 ; CHECK: eor w1, w2, w3              ; encoding: [0x41,0x00,0x03,0x4a]
    172 ; CHECK: eor x1, x2, x3              ; encoding: [0x41,0x00,0x03,0xca]
    173 ; CHECK: eor w1, w2, w3, lsl #5      ; encoding: [0x41,0x14,0x03,0x4a]
    174 ; CHECK: eor x1, x2, x3, lsl #5      ; encoding: [0x41,0x14,0x03,0xca]
    175 ; CHECK: eor w1, w2, w3, lsr #5      ; encoding: [0x41,0x14,0x43,0x4a]
    176 ; CHECK: eor x1, x2, x3, lsr #5      ; encoding: [0x41,0x14,0x43,0xca]
    177 ; CHECK: eor w1, w2, w3, asr #5      ; encoding: [0x41,0x14,0x83,0x4a]
    178 ; CHECK: eor x1, x2, x3, asr #5      ; encoding: [0x41,0x14,0x83,0xca]
    179 ; CHECK: eor w1, w2, w3, ror #5      ; encoding: [0x41,0x14,0xc3,0x4a]
    180 ; CHECK: eor x1, x2, x3, ror #5      ; encoding: [0x41,0x14,0xc3,0xca]
    181 
    182   orr w1, w2, w3
    183   orr x1, x2, x3
    184   orr w1, w2, w3, lsl #6
    185   orr x1, x2, x3, lsl #6
    186   orr w1, w2, w3, lsr #6
    187   orr x1, x2, x3, lsr #6
    188   orr w1, w2, w3, asr #6
    189   orr x1, x2, x3, asr #6
    190   orr w1, w2, w3, ror #6
    191   orr x1, x2, x3, ror #6
    192 
    193 ; CHECK: orr w1, w2, w3              ; encoding: [0x41,0x00,0x03,0x2a]
    194 ; CHECK: orr x1, x2, x3              ; encoding: [0x41,0x00,0x03,0xaa]
    195 ; CHECK: orr w1, w2, w3, lsl #6      ; encoding: [0x41,0x18,0x03,0x2a]
    196 ; CHECK: orr x1, x2, x3, lsl #6      ; encoding: [0x41,0x18,0x03,0xaa]
    197 ; CHECK: orr w1, w2, w3, lsr #6      ; encoding: [0x41,0x18,0x43,0x2a]
    198 ; CHECK: orr x1, x2, x3, lsr #6      ; encoding: [0x41,0x18,0x43,0xaa]
    199 ; CHECK: orr w1, w2, w3, asr #6      ; encoding: [0x41,0x18,0x83,0x2a]
    200 ; CHECK: orr x1, x2, x3, asr #6      ; encoding: [0x41,0x18,0x83,0xaa]
    201 ; CHECK: orr w1, w2, w3, ror #6      ; encoding: [0x41,0x18,0xc3,0x2a]
    202 ; CHECK: orr x1, x2, x3, ror #6      ; encoding: [0x41,0x18,0xc3,0xaa]
    203 
    204   orn w1, w2, w3
    205   orn x1, x2, x3
    206   orn w1, w2, w3, lsl #7
    207   orn x1, x2, x3, lsl #7
    208   orn w1, w2, w3, lsr #7
    209   orn x1, x2, x3, lsr #7
    210   orn w1, w2, w3, asr #7
    211   orn x1, x2, x3, asr #7
    212   orn w1, w2, w3, ror #7
    213   orn x1, x2, x3, ror #7
    214 
    215 ; CHECK: orn w1, w2, w3              ; encoding: [0x41,0x00,0x23,0x2a]
    216 ; CHECK: orn x1, x2, x3              ; encoding: [0x41,0x00,0x23,0xaa]
    217 ; CHECK: orn w1, w2, w3, lsl #7      ; encoding: [0x41,0x1c,0x23,0x2a]
    218 ; CHECK: orn x1, x2, x3, lsl #7      ; encoding: [0x41,0x1c,0x23,0xaa]
    219 ; CHECK: orn w1, w2, w3, lsr #7      ; encoding: [0x41,0x1c,0x63,0x2a]
    220 ; CHECK: orn x1, x2, x3, lsr #7      ; encoding: [0x41,0x1c,0x63,0xaa]
    221 ; CHECK: orn w1, w2, w3, asr #7      ; encoding: [0x41,0x1c,0xa3,0x2a]
    222 ; CHECK: orn x1, x2, x3, asr #7      ; encoding: [0x41,0x1c,0xa3,0xaa]
    223 ; CHECK: orn w1, w2, w3, ror #7      ; encoding: [0x41,0x1c,0xe3,0x2a]
    224 ; CHECK: orn x1, x2, x3, ror #7      ; encoding: [0x41,0x1c,0xe3,0xaa]
    225