1 # Instructions that are available for the current ISA but should be rejected by 2 # the assembler (e.g. invalid set of operands or operand's restrictions not met). 3 4 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r6 2>%t1 5 # RUN: FileCheck %s < %t1 -check-prefix=ASM 6 7 .text 8 .set noreorder 9 .set noat 10 jalr.hb $31 # ASM: :[[@LINE]]:9: error: source and destination must be different 11 jalr.hb $31, $31 # ASM: :[[@LINE]]:9: error: source and destination must be different 12 ldc2 $8,-21181($at) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 sdc2 $20,23157($s2) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 swc2 $25,24880($s0) # ASM: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15
