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      1 ; RUN: opt < %s -jump-threading -S | FileCheck %s
      2 
      3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
      4 target triple = "i386-apple-darwin7"
      5 
      6 ; Test that we can thread through the block with the partially redundant load (%2).
      7 ; rdar://6402033
      8 define i32 @test1(i32* %P) nounwind {
      9 ; CHECK-LABEL: @test1(
     10 entry:
     11 	%0 = tail call i32 (...) @f1() nounwind		; <i32> [#uses=1]
     12 	%1 = icmp eq i32 %0, 0		; <i1> [#uses=1]
     13 	br i1 %1, label %bb1, label %bb
     14 
     15 bb:		; preds = %entry
     16 ; CHECK: bb1.thread:
     17 ; CHECK: store
     18 ; CHECK: br label %bb3
     19 	store i32 42, i32* %P, align 4
     20 	br label %bb1
     21 
     22 bb1:		; preds = %entry, %bb
     23 	%res.0 = phi i32 [ 1, %bb ], [ 0, %entry ]		; <i32> [#uses=2]
     24 	%2 = load i32, i32* %P, align 4		; <i32> [#uses=1]
     25 	%3 = icmp sgt i32 %2, 36		; <i1> [#uses=1]
     26 	br i1 %3, label %bb3, label %bb2
     27 
     28 bb2:		; preds = %bb1
     29 	%4 = tail call i32 (...) @f2() nounwind		; <i32> [#uses=0]
     30 	ret i32 %res.0
     31 
     32 bb3:		; preds = %bb1
     33 ; CHECK: bb3:
     34 ; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
     35 ; CHECK: ret i32 %res.01
     36 	ret i32 %res.0
     37 }
     38 
     39 declare i32 @f1(...)
     40 
     41 declare i32 @f2(...)
     42 
     43 
     44 ;; Check that we preserve TBAA information.
     45 ; rdar://11039258
     46 
     47 define i32 @test2(i32* %P) nounwind {
     48 ; CHECK-LABEL: @test2(
     49 entry:
     50 	%0 = tail call i32 (...) @f1() nounwind		; <i32> [#uses=1]
     51 	%1 = icmp eq i32 %0, 0		; <i1> [#uses=1]
     52 	br i1 %1, label %bb1, label %bb
     53 
     54 bb:		; preds = %entry
     55 ; CHECK: bb1.thread:
     56 ; CHECK: store{{.*}}, !tbaa !0
     57 ; CHECK: br label %bb3
     58 	store i32 42, i32* %P, align 4, !tbaa !0
     59 	br label %bb1
     60 
     61 bb1:		; preds = %entry, %bb
     62 	%res.0 = phi i32 [ 1, %bb ], [ 0, %entry ]
     63 	%2 = load i32, i32* %P, align 4, !tbaa !0
     64 	%3 = icmp sgt i32 %2, 36
     65 	br i1 %3, label %bb3, label %bb2
     66 
     67 bb2:		; preds = %bb1
     68 	%4 = tail call i32 (...) @f2() nounwind
     69 	ret i32 %res.0
     70 
     71 bb3:		; preds = %bb1
     72 ; CHECK: bb3:
     73 ; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
     74 ; CHECK: ret i32 %res.01
     75 	ret i32 %res.0
     76 }
     77 
     78 define i32 @test3(i8** %x, i1 %f) {
     79 ; Correctly thread loads of different (but compatible) types, placing bitcasts
     80 ; as necessary in the predecessors. This is especially tricky because the same
     81 ; predecessor ends up with two entries in the PHI node and they must share
     82 ; a single cast.
     83 ; CHECK-LABEL: @test3(
     84 entry:
     85   %0 = bitcast i8** %x to i32**
     86   %1 = load i32*, i32** %0, align 8
     87   br i1 %f, label %if.end57, label %if.then56
     88 ; CHECK: %[[LOAD:.*]] = load i32*, i32**
     89 ; CHECK: %[[CAST:.*]] = bitcast i32* %[[LOAD]] to i8*
     90 
     91 if.then56:
     92   br label %if.end57
     93 
     94 if.end57:
     95   %2 = load i8*, i8** %x, align 8
     96   %tobool59 = icmp eq i8* %2, null
     97   br i1 %tobool59, label %return, label %if.then60
     98 ; CHECK: %[[PHI:.*]] = phi i8* [ %[[CAST]], %[[PRED:[^ ]+]] ], [ %[[CAST]], %[[PRED]] ]
     99 ; CHECK-NEXT: %[[CMP:.*]] = icmp eq i8* %[[PHI]], null
    100 ; CHECK-NEXT: br i1 %[[CMP]]
    101 
    102 if.then60:
    103   ret i32 42
    104 
    105 return:
    106   ret i32 13
    107 }
    108 
    109 !0 = !{!3, !3, i64 0}
    110 !1 = !{!"omnipotent char", !2}
    111 !2 = !{!"Simple C/C++ TBAA", null}
    112 !3 = !{!"int", !1}
    113