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      1 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1 -force-vector-interleave=2 -loop-vectorize < %s | FileCheck %s --check-prefix=UNROLL
      2 ; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2 -force-vector-interleave=1 -loop-vectorize -enable-cond-stores-vec < %s | FileCheck %s --check-prefix=VEC
      3 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
      4 target triple = "x86_64-apple-macosx10.9.0"
      5 
      6 ; Test predication of stores.
      7 define i32 @test(i32* nocapture %f) #0 {
      8 entry:
      9   br label %for.body
     10 
     11 ; VEC-LABEL: test
     12 ; VEC:   %[[v8:.+]] = icmp sgt <2 x i32> %{{.*}}, <i32 100, i32 100>
     13 ; VEC:   %[[v9:.+]] = add nsw <2 x i32> %{{.*}}, <i32 20, i32 20>
     14 ; VEC:   %[[v10:.+]] = and <2 x i1> %[[v8]], <i1 true, i1 true>
     15 ; VEC:   %[[v11:.+]] = extractelement <2 x i1> %[[v10]], i32 0
     16 ; VEC:   %[[v12:.+]] = icmp eq i1 %[[v11]], true
     17 ; VEC:   br i1 %[[v12]], label %[[cond:.+]], label %[[else:.+]]
     18 ;
     19 ; VEC: [[cond]]:
     20 ; VEC:   %[[v13:.+]] = extractelement <2 x i32> %[[v9]], i32 0
     21 ; VEC:   %[[v14:.+]] = extractelement <2 x i32*> %{{.*}}, i32 0
     22 ; VEC:   store i32 %[[v13]], i32* %[[v14]], align 4
     23 ; VEC:   br label %[[else:.+]]
     24 ;
     25 ; VEC: [[else]]:
     26 ; VEC:   %[[v15:.+]] = extractelement <2 x i1> %[[v10]], i32 1
     27 ; VEC:   %[[v16:.+]] = icmp eq i1 %[[v15]], true
     28 ; VEC:   br i1 %[[v16]], label %[[cond2:.+]], label %[[else2:.+]]
     29 ;
     30 ; VEC: [[cond2]]:
     31 ; VEC:   %[[v17:.+]] = extractelement <2 x i32> %[[v9]], i32 1
     32 ; VEC:   %[[v18:.+]] = extractelement <2 x i32*> %{{.+}} i32 1
     33 ; VEC:   store i32 %[[v17]], i32* %[[v18]], align 4
     34 ; VEC:   br label %[[else2:.+]]
     35 ;
     36 ; VEC: [[else2]]:
     37 
     38 ; UNROLL-LABEL: test
     39 ; UNROLL: vector.body:
     40 ; UNROLL:   %[[IND:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 0
     41 ; UNROLL:   %[[IND1:[a-zA-Z0-9]+]] = add i64 %{{.*}}, 1
     42 ; UNROLL:   %[[v0:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND]]
     43 ; UNROLL:   %[[v1:[a-zA-Z0-9]+]] = getelementptr inbounds i32, i32* %f, i64 %[[IND1]]
     44 ; UNROLL:   %[[v2:[a-zA-Z0-9]+]] = load i32, i32* %[[v0]], align 4
     45 ; UNROLL:   %[[v3:[a-zA-Z0-9]+]] = load i32, i32* %[[v1]], align 4
     46 ; UNROLL:   %[[v4:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v2]], 100
     47 ; UNROLL:   %[[v5:[a-zA-Z0-9]+]] = icmp sgt i32 %[[v3]], 100
     48 ; UNROLL:   %[[v6:[a-zA-Z0-9]+]] = add nsw i32 %[[v2]], 20
     49 ; UNROLL:   %[[v7:[a-zA-Z0-9]+]] = add nsw i32 %[[v3]], 20
     50 ; UNROLL:   %[[v8:[a-zA-Z0-9]+]] = icmp eq i1 %[[v4]], true
     51 ; UNROLL:   br i1 %[[v8]], label %[[cond:[a-zA-Z0-9.]+]], label %[[else:[a-zA-Z0-9.]+]]
     52 ;
     53 ; UNROLL: [[cond]]:
     54 ; UNROLL:   store i32 %[[v6]], i32* %[[v0]], align 4
     55 ; UNROLL:   br label %[[else]]
     56 ;
     57 ; UNROLL: [[else]]:
     58 ; UNROLL:   %[[v9:[a-zA-Z0-9]+]] = icmp eq i1 %[[v5]], true
     59 ; UNROLL:   br i1 %[[v9]], label %[[cond2:[a-zA-Z0-9.]+]], label %[[else2:[a-zA-Z0-9.]+]]
     60 ;
     61 ; UNROLL: [[cond2]]:
     62 ; UNROLL:   store i32 %[[v7]], i32* %[[v1]], align 4
     63 ; UNROLL:   br label %[[else2]]
     64 ;
     65 ; UNROLL: [[else2]]:
     66 
     67 for.body:
     68   %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ]
     69   %arrayidx = getelementptr inbounds i32, i32* %f, i64 %indvars.iv
     70   %0 = load i32, i32* %arrayidx, align 4
     71   %cmp1 = icmp sgt i32 %0, 100
     72   br i1 %cmp1, label %if.then, label %for.inc
     73 
     74 if.then:
     75   %add = add nsw i32 %0, 20
     76   store i32 %add, i32* %arrayidx, align 4
     77   br label %for.inc
     78 
     79 for.inc:
     80   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
     81   %exitcond = icmp eq i64 %indvars.iv.next, 128
     82   br i1 %exitcond, label %for.end, label %for.body
     83 
     84 for.end:
     85   ret i32 0
     86 }
     87 
     88 ; Track basic blocks when unrolling conditional blocks. This code used to assert
     89 ; because we did not update the phi nodes with the proper predecessor in the
     90 ; vectorized loop body.
     91 ; PR18724
     92 
     93 ; UNROLL-LABEL: bug18724
     94 ; UNROLL: store i32
     95 ; UNROLL: store i32
     96 
     97 define void @bug18724() {
     98 entry:
     99   br label %for.body9
    100 
    101 for.body9:
    102   br i1 undef, label %for.inc26, label %for.body14
    103 
    104 for.body14:
    105   %indvars.iv3 = phi i64 [ %indvars.iv.next4, %for.inc23 ], [ undef, %for.body9 ]
    106   %iNewChunks.120 = phi i32 [ %iNewChunks.2, %for.inc23 ], [ undef, %for.body9 ]
    107   %arrayidx16 = getelementptr inbounds [768 x i32], [768 x i32]* undef, i64 0, i64 %indvars.iv3
    108   %tmp = load i32, i32* %arrayidx16, align 4
    109   br i1 undef, label %if.then18, label %for.inc23
    110 
    111 if.then18:
    112   store i32 2, i32* %arrayidx16, align 4
    113   %inc21 = add nsw i32 %iNewChunks.120, 1
    114   br label %for.inc23
    115 
    116 for.inc23:
    117   %iNewChunks.2 = phi i32 [ %inc21, %if.then18 ], [ %iNewChunks.120, %for.body14 ]
    118   %indvars.iv.next4 = add nsw i64 %indvars.iv3, 1
    119   %tmp1 = trunc i64 %indvars.iv3 to i32
    120   %cmp13 = icmp slt i32 %tmp1, 0
    121   br i1 %cmp13, label %for.body14, label %for.inc26
    122 
    123 for.inc26:
    124   %iNewChunks.1.lcssa = phi i32 [ undef, %for.body9 ], [ %iNewChunks.2, %for.inc23 ]
    125   unreachable
    126 }
    127