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      1 /*
      2  * Copyright 2010 Jerome Glisse <glisse (at) freedesktop.org>
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * on the rights to use, copy, modify, merge, publish, distribute, sub
      8  * license, and/or sell copies of the Software, and to permit persons to whom
      9  * the Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
     19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
     22  *
     23  * Authors:
     24  *      Jerome Glisse
     25  */
     26 #ifndef RADEONSI_PIPE_H
     27 #define RADEONSI_PIPE_H
     28 
     29 #include "../../winsys/radeon/drm/radeon_winsys.h"
     30 
     31 #include "pipe/p_state.h"
     32 #include "pipe/p_screen.h"
     33 #include "pipe/p_context.h"
     34 #include "util/u_format.h"
     35 #include "util/u_math.h"
     36 #include "util/u_slab.h"
     37 #include "r600.h"
     38 #include "radeonsi_public.h"
     39 #include "radeonsi_pm4.h"
     40 #include "si_state.h"
     41 #include "r600_resource.h"
     42 #include "sid.h"
     43 
     44 #define R600_MAX_CONST_BUFFERS 1
     45 #define R600_MAX_CONST_BUFFER_SIZE 4096
     46 
     47 #ifdef PIPE_ARCH_BIG_ENDIAN
     48 #define R600_BIG_ENDIAN 1
     49 #else
     50 #define R600_BIG_ENDIAN 0
     51 #endif
     52 
     53 struct r600_pipe_fences {
     54 	struct si_resource		*bo;
     55 	unsigned			*data;
     56 	unsigned			next_index;
     57 	/* linked list of preallocated blocks */
     58 	struct list_head		blocks;
     59 	/* linked list of freed fences */
     60 	struct list_head		pool;
     61 	pipe_mutex			mutex;
     62 };
     63 
     64 struct r600_screen {
     65 	struct pipe_screen		screen;
     66 	struct radeon_winsys		*ws;
     67 	unsigned			family;
     68 	enum chip_class			chip_class;
     69 	struct radeon_info		info;
     70 	struct r600_tiling_info		tiling_info;
     71 	struct util_slab_mempool	pool_buffers;
     72 	struct r600_pipe_fences		fences;
     73 };
     74 
     75 struct si_pipe_sampler_view {
     76 	struct pipe_sampler_view	base;
     77 	uint32_t			state[8];
     78 };
     79 
     80 struct si_pipe_sampler_state {
     81 	uint32_t			val[4];
     82 };
     83 
     84 /* needed for blitter save */
     85 #define NUM_TEX_UNITS 16
     86 
     87 struct r600_textures_info {
     88 	struct si_pipe_sampler_view	*views[NUM_TEX_UNITS];
     89 	struct si_pipe_sampler_state	*samplers[NUM_TEX_UNITS];
     90 	unsigned			n_views;
     91 	unsigned			n_samplers;
     92 	bool				samplers_dirty;
     93 	bool				is_array_sampler[NUM_TEX_UNITS];
     94 };
     95 
     96 struct r600_fence {
     97 	struct pipe_reference		reference;
     98 	unsigned			index; /* in the shared bo */
     99 	struct si_resource            *sleep_bo;
    100 	struct list_head		head;
    101 };
    102 
    103 #define FENCE_BLOCK_SIZE 16
    104 
    105 struct r600_fence_block {
    106 	struct r600_fence		fences[FENCE_BLOCK_SIZE];
    107 	struct list_head		head;
    108 };
    109 
    110 #define R600_CONSTANT_ARRAY_SIZE 256
    111 #define R600_RESOURCE_ARRAY_SIZE 160
    112 
    113 struct r600_context {
    114 	struct pipe_context		context;
    115 	struct blitter_context		*blitter;
    116 	enum radeon_family		family;
    117 	enum chip_class			chip_class;
    118 	void				*custom_dsa_flush;
    119 	struct r600_screen		*screen;
    120 	struct radeon_winsys		*ws;
    121 	struct si_vertex_element	*vertex_elements;
    122 	struct pipe_framebuffer_state	framebuffer;
    123 	unsigned			pa_sc_line_stipple;
    124 	unsigned			pa_su_sc_mode_cntl;
    125 	unsigned			pa_cl_clip_cntl;
    126 	unsigned			pa_cl_vs_out_cntl;
    127 	/* for saving when using blitter */
    128 	struct pipe_stencil_ref		stencil_ref;
    129 	struct si_pipe_shader_selector	*ps_shader;
    130 	struct si_pipe_shader_selector	*vs_shader;
    131 	struct pipe_query		*current_render_cond;
    132 	unsigned			current_render_cond_mode;
    133 	struct pipe_query		*saved_render_cond;
    134 	unsigned			saved_render_cond_mode;
    135 	/* shader information */
    136 	unsigned			sprite_coord_enable;
    137 	unsigned			export_16bpc;
    138 	unsigned			spi_shader_col_format;
    139 	unsigned			alpha_ref;
    140 	boolean				alpha_ref_dirty;
    141 	struct r600_textures_info	vs_samplers;
    142 	struct r600_textures_info	ps_samplers;
    143 	boolean				shader_dirty;
    144 
    145 	struct u_upload_mgr	        *uploader;
    146 	struct util_slab_mempool	pool_transfers;
    147 	boolean				have_depth_texture, have_depth_fb;
    148 
    149 	unsigned default_ps_gprs, default_vs_gprs;
    150 
    151 	/* Below are variables from the old r600_context.
    152 	 */
    153 	struct radeon_winsys_cs	*cs;
    154 
    155 	unsigned		pm4_dirty_cdwords;
    156 
    157 	/* The list of active queries. Only one query of each type can be active. */
    158 	struct list_head	active_query_list;
    159 	unsigned		num_cs_dw_queries_suspend;
    160 	unsigned		num_cs_dw_streamout_end;
    161 
    162 	unsigned		backend_mask;
    163 	unsigned                max_db; /* for OQ */
    164 	unsigned		flags;
    165 	boolean                 predicate_drawing;
    166 
    167 	unsigned		num_so_targets;
    168 	struct r600_so_target	*so_targets[PIPE_MAX_SO_BUFFERS];
    169 	boolean			streamout_start;
    170 	unsigned		streamout_append_bitmask;
    171 	unsigned		*vs_so_stride_in_dw;
    172 	unsigned		*vs_shader_so_strides;
    173 
    174 	/* Vertex and index buffers. */
    175 	bool			vertex_buffers_dirty;
    176 	struct pipe_index_buffer index_buffer;
    177 	struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
    178 	unsigned		nr_vertex_buffers;
    179 
    180 	/* With rasterizer discard, there doesn't have to be a pixel shader.
    181 	 * In that case, we bind this one: */
    182 	struct si_pipe_shader	*dummy_pixel_shader;
    183 
    184 	/* SI state handling */
    185 	union si_state	queued;
    186 	union si_state	emitted;
    187 };
    188 
    189 /* r600_blit.c */
    190 void si_init_blit_functions(struct r600_context *rctx);
    191 void si_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
    192 void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
    193 void si_flush_depth_textures(struct r600_context *rctx);
    194 
    195 /* r600_buffer.c */
    196 bool si_init_resource(struct r600_screen *rscreen,
    197 		      struct si_resource *res,
    198 		      unsigned size, unsigned alignment,
    199 		      unsigned bind, unsigned usage);
    200 struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
    201 				       const struct pipe_resource *templ);
    202 void r600_upload_index_buffer(struct r600_context *rctx,
    203 			      struct pipe_index_buffer *ib, unsigned count);
    204 
    205 
    206 /* r600_pipe.c */
    207 void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
    208 		    unsigned flags);
    209 
    210 /* r600_query.c */
    211 void r600_init_query_functions(struct r600_context *rctx);
    212 
    213 /* r600_resource.c */
    214 void r600_init_context_resource_functions(struct r600_context *r600);
    215 
    216 /* r600_texture.c */
    217 void r600_init_screen_texture_functions(struct pipe_screen *screen);
    218 void si_init_surface_functions(struct r600_context *r600);
    219 
    220 /* r600_translate.c */
    221 void r600_translate_index_buffer(struct r600_context *r600,
    222 				 struct pipe_index_buffer *ib,
    223 				 unsigned count);
    224 
    225 /*
    226  * common helpers
    227  */
    228 static INLINE uint32_t S_FIXED(float value, uint32_t frac_bits)
    229 {
    230 	return value * (1 << frac_bits);
    231 }
    232 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
    233 
    234 static INLINE unsigned si_map_swizzle(unsigned swizzle)
    235 {
    236 	switch (swizzle) {
    237 	case UTIL_FORMAT_SWIZZLE_Y:
    238 		return V_008F0C_SQ_SEL_Y;
    239 	case UTIL_FORMAT_SWIZZLE_Z:
    240 		return V_008F0C_SQ_SEL_Z;
    241 	case UTIL_FORMAT_SWIZZLE_W:
    242 		return V_008F0C_SQ_SEL_W;
    243 	case UTIL_FORMAT_SWIZZLE_0:
    244 		return V_008F0C_SQ_SEL_0;
    245 	case UTIL_FORMAT_SWIZZLE_1:
    246 		return V_008F0C_SQ_SEL_1;
    247 	default: /* UTIL_FORMAT_SWIZZLE_X */
    248 		return V_008F0C_SQ_SEL_X;
    249 	}
    250 }
    251 
    252 static inline unsigned r600_tex_aniso_filter(unsigned filter)
    253 {
    254 	if (filter <= 1)   return 0;
    255 	if (filter <= 2)   return 1;
    256 	if (filter <= 4)   return 2;
    257 	if (filter <= 8)   return 3;
    258 	 /* else */        return 4;
    259 }
    260 
    261 /* 12.4 fixed-point */
    262 static INLINE unsigned r600_pack_float_12p4(float x)
    263 {
    264 	return x <= 0    ? 0 :
    265 	       x >= 4096 ? 0xffff : x * 16;
    266 }
    267 
    268 static INLINE uint64_t r600_resource_va(struct pipe_screen *screen, struct pipe_resource *resource)
    269 {
    270 	struct r600_screen *rscreen = (struct r600_screen*)screen;
    271 	struct si_resource *rresource = (struct si_resource*)resource;
    272 
    273 	return rscreen->ws->buffer_get_virtual_address(rresource->cs_buf);
    274 }
    275 
    276 #endif
    277