Home | History | Annotate | Download | only in i965 
      1 /*
      2  * Copyright  2009 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  *
     23  * Authors:
     24  *    Eric Anholt <eric (at) anholt.net>
     25  *
     26  */
     27 
     28 #include "brw_context.h"
     29 #include "brw_state.h"
     30 #include "brw_defines.h"
     31 #include "intel_batchbuffer.h"
     32 #include "main/fbobject.h"
     33 
     34 /* The clip VP defines the guardband region where expensive clipping is skipped
     35  * and fragments are allowed to be generated and clipped out cheaply by the SF.
     36  *
     37  * By setting it to NDC bounds of [-1,1], we don't do GB clipping.  It's
     38  * supposed to cause seams to become visible in apps due to shared edges taking
     39  * different clip/no clip paths depending on whether the rest of the prim ends
     40  * up in the guardband or not.
     41  */
     42 static void
     43 gen6_upload_clip_vp(struct brw_context *brw)
     44 {
     45    struct brw_clipper_viewport *vp;
     46 
     47    vp = brw_state_batch(brw, AUB_TRACE_CLIP_VP_STATE,
     48 			sizeof(*vp), 32, &brw->clip.vp_offset);
     49 
     50    vp->xmin = -1.0;
     51    vp->xmax = 1.0;
     52    vp->ymin = -1.0;
     53    vp->ymax = 1.0;
     54 
     55    brw->state.dirty.cache |= CACHE_NEW_CLIP_VP;
     56 }
     57 
     58 const struct brw_tracked_state gen6_clip_vp = {
     59    .dirty = {
     60       .mesa = 0,
     61       .brw = BRW_NEW_BATCH,
     62       .cache = 0,
     63    },
     64    .emit = gen6_upload_clip_vp,
     65 };
     66 
     67 static void
     68 gen6_upload_sf_vp(struct brw_context *brw)
     69 {
     70    struct gl_context *ctx = &brw->intel.ctx;
     71    const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
     72    struct brw_sf_viewport *sfv;
     73    GLfloat y_scale, y_bias;
     74    const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
     75    const GLfloat *v = ctx->Viewport._WindowMap.m;
     76 
     77    sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE,
     78 			 sizeof(*sfv), 32, &brw->sf.vp_offset);
     79    memset(sfv, 0, sizeof(*sfv));
     80 
     81    /* _NEW_BUFFERS */
     82    if (render_to_fbo) {
     83       y_scale = 1.0;
     84       y_bias = 0;
     85    } else {
     86       y_scale = -1.0;
     87       y_bias = ctx->DrawBuffer->Height;
     88    }
     89 
     90    /* _NEW_VIEWPORT */
     91    sfv->viewport.m00 = v[MAT_SX];
     92    sfv->viewport.m11 = v[MAT_SY] * y_scale;
     93    sfv->viewport.m22 = v[MAT_SZ] * depth_scale;
     94    sfv->viewport.m30 = v[MAT_TX];
     95    sfv->viewport.m31 = v[MAT_TY] * y_scale + y_bias;
     96    sfv->viewport.m32 = v[MAT_TZ] * depth_scale;
     97 
     98    brw->state.dirty.cache |= CACHE_NEW_SF_VP;
     99 }
    100 
    101 const struct brw_tracked_state gen6_sf_vp = {
    102    .dirty = {
    103       .mesa = _NEW_VIEWPORT | _NEW_BUFFERS,
    104       .brw = BRW_NEW_BATCH,
    105       .cache = 0,
    106    },
    107    .emit = gen6_upload_sf_vp,
    108 };
    109 
    110 static void upload_viewport_state_pointers(struct brw_context *brw)
    111 {
    112    struct intel_context *intel = &brw->intel;
    113 
    114    BEGIN_BATCH(4);
    115    OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS << 16 | (4 - 2) |
    116 	     GEN6_CC_VIEWPORT_MODIFY |
    117 	     GEN6_SF_VIEWPORT_MODIFY |
    118 	     GEN6_CLIP_VIEWPORT_MODIFY);
    119    OUT_BATCH(brw->clip.vp_offset);
    120    OUT_BATCH(brw->sf.vp_offset);
    121    OUT_BATCH(brw->cc.vp_offset);
    122    ADVANCE_BATCH();
    123 }
    124 
    125 const struct brw_tracked_state gen6_viewport_state = {
    126    .dirty = {
    127       .mesa = 0,
    128       .brw = (BRW_NEW_BATCH |
    129 	      BRW_NEW_STATE_BASE_ADDRESS),
    130       .cache = (CACHE_NEW_CLIP_VP |
    131 		CACHE_NEW_SF_VP |
    132 		CACHE_NEW_CC_VP)
    133    },
    134    .emit = upload_viewport_state_pointers,
    135 };
    136