1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __ASM_APICDEF_H 20 #define __ASM_APICDEF_H 21 #define APIC_DEFAULT_PHYS_BASE 0xfee00000 22 #define APIC_ID 0x20 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define APIC_LVR 0x30 25 #define APIC_LVR_MASK 0xFF00FF 26 #define GET_APIC_VERSION(x) ((x)&0xFF) 27 #define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF) 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define APIC_INTEGRATED(x) ((x)&0xF0) 30 #define APIC_XAPIC(x) ((x) >= 0x14) 31 #define APIC_TASKPRI 0x80 32 #define APIC_TPRI_MASK 0xFF 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define APIC_ARBPRI 0x90 35 #define APIC_ARBPRI_MASK 0xFF 36 #define APIC_PROCPRI 0xA0 37 #define APIC_EOI 0xB0 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define APIC_EIO_ACK 0x0 40 #define APIC_RRR 0xC0 41 #define APIC_LDR 0xD0 42 #define APIC_LDR_MASK (0xFF<<24) 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define GET_APIC_LOGICAL_ID(x) (((x)>>24)&0xFF) 45 #define SET_APIC_LOGICAL_ID(x) (((x)<<24)) 46 #define APIC_ALL_CPUS 0xFF 47 #define APIC_DFR 0xE0 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define APIC_DFR_CLUSTER 0x0FFFFFFFul 50 #define APIC_DFR_FLAT 0xFFFFFFFFul 51 #define APIC_SPIV 0xF0 52 #define APIC_SPIV_FOCUS_DISABLED (1<<9) 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define APIC_SPIV_APIC_ENABLED (1<<8) 55 #define APIC_ISR 0x100 56 #define APIC_ISR_NR 0x8 57 #define APIC_TMR 0x180 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define APIC_IRR 0x200 60 #define APIC_ESR 0x280 61 #define APIC_ESR_SEND_CS 0x00001 62 #define APIC_ESR_RECV_CS 0x00002 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define APIC_ESR_SEND_ACC 0x00004 65 #define APIC_ESR_RECV_ACC 0x00008 66 #define APIC_ESR_SENDILL 0x00020 67 #define APIC_ESR_RECVILL 0x00040 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define APIC_ESR_ILLREGA 0x00080 70 #define APIC_ICR 0x300 71 #define APIC_DEST_SELF 0x40000 72 #define APIC_DEST_ALLINC 0x80000 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define APIC_DEST_ALLBUT 0xC0000 75 #define APIC_ICR_RR_MASK 0x30000 76 #define APIC_ICR_RR_INVALID 0x00000 77 #define APIC_ICR_RR_INPROG 0x10000 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define APIC_ICR_RR_VALID 0x20000 80 #define APIC_INT_LEVELTRIG 0x08000 81 #define APIC_INT_ASSERT 0x04000 82 #define APIC_ICR_BUSY 0x01000 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 #define APIC_DEST_LOGICAL 0x00800 85 #define APIC_DM_FIXED 0x00000 86 #define APIC_DM_LOWEST 0x00100 87 #define APIC_DM_SMI 0x00200 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 #define APIC_DM_REMRD 0x00300 90 #define APIC_DM_NMI 0x00400 91 #define APIC_DM_INIT 0x00500 92 #define APIC_DM_STARTUP 0x00600 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define APIC_DM_EXTINT 0x00700 95 #define APIC_VECTOR_MASK 0x000FF 96 #define APIC_ICR2 0x310 97 #define GET_APIC_DEST_FIELD(x) (((x)>>24)&0xFF) 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define SET_APIC_DEST_FIELD(x) ((x)<<24) 100 #define APIC_LVTT 0x320 101 #define APIC_LVTTHMR 0x330 102 #define APIC_LVTPC 0x340 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 #define APIC_LVT0 0x350 105 #define APIC_LVT_TIMER_BASE_MASK (0x3<<18) 106 #define GET_APIC_TIMER_BASE(x) (((x)>>18)&0x3) 107 #define SET_APIC_TIMER_BASE(x) (((x)<<18)) 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 #define APIC_TIMER_BASE_CLKIN 0x0 110 #define APIC_TIMER_BASE_TMBASE 0x1 111 #define APIC_TIMER_BASE_DIV 0x2 112 #define APIC_LVT_TIMER_PERIODIC (1<<17) 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 #define APIC_LVT_MASKED (1<<16) 115 #define APIC_LVT_LEVEL_TRIGGER (1<<15) 116 #define APIC_LVT_REMOTE_IRR (1<<14) 117 #define APIC_INPUT_POLARITY (1<<13) 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 #define APIC_SEND_PENDING (1<<12) 120 #define APIC_MODE_MASK 0x700 121 #define GET_APIC_DELIVERY_MODE(x) (((x)>>8)&0x7) 122 #define SET_APIC_DELIVERY_MODE(x,y) (((x)&~0x700)|((y)<<8)) 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 #define APIC_MODE_FIXED 0x0 125 #define APIC_MODE_NMI 0x4 126 #define APIC_MODE_EXTINT 0x7 127 #define APIC_LVT1 0x360 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 #define APIC_LVTERR 0x370 130 #define APIC_TMICT 0x380 131 #define APIC_TMCCT 0x390 132 #define APIC_TDCR 0x3E0 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 #define APIC_TDR_DIV_TMBASE (1<<2) 135 #define APIC_TDR_DIV_1 0xB 136 #define APIC_TDR_DIV_2 0x0 137 #define APIC_TDR_DIV_4 0x1 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 #define APIC_TDR_DIV_8 0x2 140 #define APIC_TDR_DIV_16 0x3 141 #define APIC_TDR_DIV_32 0x8 142 #define APIC_TDR_DIV_64 0x9 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 #define APIC_TDR_DIV_128 0xA 145 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) 146 #define MAX_IO_APICS 64 147 #define u32 unsigned int 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 struct local_apic { 150 struct { u32 __reserved[4]; } __reserved_01; 151 struct { u32 __reserved[4]; } __reserved_02; 152 struct { 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 u32 __reserved_1 : 24, 155 phys_apic_id : 4, 156 __reserved_2 : 4; 157 u32 __reserved[3]; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 } id; 160 const 161 struct { 162 u32 version : 8, 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 __reserved_1 : 8, 165 max_lvt : 8, 166 __reserved_2 : 8; 167 u32 __reserved[3]; 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 } version; 170 struct { u32 __reserved[4]; } __reserved_03; 171 struct { u32 __reserved[4]; } __reserved_04; 172 struct { u32 __reserved[4]; } __reserved_05; 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 struct { u32 __reserved[4]; } __reserved_06; 175 struct { 176 u32 priority : 8, 177 __reserved_1 : 24; 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 u32 __reserved_2[3]; 180 } tpr; 181 const 182 struct { 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 u32 priority : 8, 185 __reserved_1 : 24; 186 u32 __reserved_2[3]; 187 } apr; 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 const 190 struct { 191 u32 priority : 8, 192 __reserved_1 : 24; 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 u32 __reserved_2[3]; 195 } ppr; 196 struct { 197 u32 eoi; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 u32 __reserved[3]; 200 } eoi; 201 struct { u32 __reserved[4]; } __reserved_07; 202 struct { 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 u32 __reserved_1 : 24, 205 logical_dest : 8; 206 u32 __reserved_2[3]; 207 } ldr; 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 struct { 210 u32 __reserved_1 : 28, 211 model : 4; 212 u32 __reserved_2[3]; 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 } dfr; 215 struct { 216 u32 spurious_vector : 8, 217 apic_enabled : 1, 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 focus_cpu : 1, 220 __reserved_2 : 22; 221 u32 __reserved_3[3]; 222 } svr; 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 struct { 225 u32 bitfield; 226 u32 __reserved[3]; 227 } isr [8]; 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 struct { 230 u32 bitfield; 231 u32 __reserved[3]; 232 } tmr [8]; 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 struct { 235 u32 bitfield; 236 u32 __reserved[3]; 237 } irr [8]; 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 union { 240 struct { 241 u32 send_cs_error : 1, 242 receive_cs_error : 1, 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 send_accept_error : 1, 245 receive_accept_error : 1, 246 __reserved_1 : 1, 247 send_illegal_vector : 1, 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 receive_illegal_vector : 1, 250 illegal_register_address : 1, 251 __reserved_2 : 24; 252 u32 __reserved_3[3]; 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 } error_bits; 255 struct { 256 u32 errors; 257 u32 __reserved_3[3]; 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 } all_errors; 260 } esr; 261 struct { u32 __reserved[4]; } __reserved_08; 262 struct { u32 __reserved[4]; } __reserved_09; 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 struct { u32 __reserved[4]; } __reserved_10; 265 struct { u32 __reserved[4]; } __reserved_11; 266 struct { u32 __reserved[4]; } __reserved_12; 267 struct { u32 __reserved[4]; } __reserved_13; 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 struct { u32 __reserved[4]; } __reserved_14; 270 struct { 271 u32 vector : 8, 272 delivery_mode : 3, 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 destination_mode : 1, 275 delivery_status : 1, 276 __reserved_1 : 1, 277 level : 1, 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 trigger : 1, 280 __reserved_2 : 2, 281 shorthand : 2, 282 __reserved_3 : 12; 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 u32 __reserved_4[3]; 285 } icr1; 286 struct { 287 union { 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 u32 __reserved_1 : 24, 290 phys_dest : 4, 291 __reserved_2 : 4; 292 u32 __reserved_3 : 24, 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 logical_dest : 8; 295 } dest; 296 u32 __reserved_4[3]; 297 } icr2; 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 struct { 300 u32 vector : 8, 301 __reserved_1 : 4, 302 delivery_status : 1, 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 __reserved_2 : 3, 305 mask : 1, 306 timer_mode : 1, 307 __reserved_3 : 14; 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 u32 __reserved_4[3]; 310 } lvt_timer; 311 struct { 312 u32 vector : 8, 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 delivery_mode : 3, 315 __reserved_1 : 1, 316 delivery_status : 1, 317 __reserved_2 : 3, 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 mask : 1, 320 __reserved_3 : 15; 321 u32 __reserved_4[3]; 322 } lvt_thermal; 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 struct { 325 u32 vector : 8, 326 delivery_mode : 3, 327 __reserved_1 : 1, 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 delivery_status : 1, 330 __reserved_2 : 3, 331 mask : 1, 332 __reserved_3 : 15; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 u32 __reserved_4[3]; 335 } lvt_pc; 336 struct { 337 u32 vector : 8, 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 delivery_mode : 3, 340 __reserved_1 : 1, 341 delivery_status : 1, 342 polarity : 1, 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 remote_irr : 1, 345 trigger : 1, 346 mask : 1, 347 __reserved_2 : 15; 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 u32 __reserved_3[3]; 350 } lvt_lint0; 351 struct { 352 u32 vector : 8, 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 delivery_mode : 3, 355 __reserved_1 : 1, 356 delivery_status : 1, 357 polarity : 1, 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 remote_irr : 1, 360 trigger : 1, 361 mask : 1, 362 __reserved_2 : 15; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 u32 __reserved_3[3]; 365 } lvt_lint1; 366 struct { 367 u32 vector : 8, 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 __reserved_1 : 4, 370 delivery_status : 1, 371 __reserved_2 : 3, 372 mask : 1, 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 __reserved_3 : 15; 375 u32 __reserved_4[3]; 376 } lvt_error; 377 struct { 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 u32 initial_count; 380 u32 __reserved_2[3]; 381 } timer_icr; 382 const 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 struct { 385 u32 curr_count; 386 u32 __reserved_2[3]; 387 } timer_ccr; 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 struct { u32 __reserved[4]; } __reserved_16; 390 struct { u32 __reserved[4]; } __reserved_17; 391 struct { u32 __reserved[4]; } __reserved_18; 392 struct { u32 __reserved[4]; } __reserved_19; 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 struct { 395 u32 divisor : 4, 396 __reserved_1 : 28; 397 u32 __reserved_2[3]; 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 } timer_dcr; 400 struct { u32 __reserved[4]; } __reserved_20; 401 } __attribute__ ((packed)); 402 #undef u32 403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 #endif 405
