Lines Matching refs:Operand
93 /// X86 SetCC. Operand 0 is condition code, and operand 1 is the EFLAGS
94 /// operand, usually produced by a CMP instruction.
113 /// X86 conditional moves. Operand 0 and operand 1 are the two values
114 /// to select from. Operand 2 is the condition code, and operand 3 is the
115 /// flag operand produced by a CMP or TEST instruction. It also writes a
119 /// X86 conditional branches. Operand 0 is the chain operand, operand 1
120 /// is the block to branch if condition is true, operand 2 is the
121 /// condition code, and operand 3 is the flag operand produced by a CMP
125 /// Return with a flag operand. Operand 0 is the chain operand, operand
129 /// Return from interrupt. Operand 0 is the number of bytes to pop.
533 /// operand, ptr to load from, and a ValueType node indicating the type
539 /// chain operand, value to store, address, and a ValueType to store it
556 /// EXTRACT_SUBVECTOR operand specifies a vector extract that is
561 /// INSERT_SUBVECTOR operand specifies a subvector insert that is
566 /// EXTRACT_SUBVECTOR operand specifies a vector extract that is
571 operand specifies a subvector insert that is
744 /// Examine constraint string and operand type and determine a weight value.
745 /// The operand object must already have been set up with the operand type.
752 /// Lower the specified operand into the Ops vector. If it is invalid, don't
1144 SDValue getRsqrtEstimate(SDValue Operand, DAGCombinerInfo &DCI,
1149 SDValue getRecipEstimate(SDValue Operand, DAGCombinerInfo &DCI,
