| /external/llvm/lib/Transforms/Utils/ |
| DemoteRegToStack.cpp | 64 // node that we cannot have multiple loads. The problem is that the
67 // keep track of and reuse loads we insert.
68 DenseMap<BasicBlock*, Value*> Loads;
71 Value *&V = Loads[PN->getIncomingBlock(i)];
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 38 STATISTIC(LoadsClustered, "Number of loads clustered together");
197 /// ClusterNeighboringLoads - Force nearby loads together by "gluing" them.
198 /// This function finds loads of the same base and different offsets. If the
210 // Look for other loads of the same chain. Find loads that are loading from
229 // optimizations really should have eliminated one of the loads.
248 // Check if the loads are close enough.
249 SmallVector<SDNode*, 4> Loads;
253 Loads.push_back(BaseLoad);
258 break; // Stop right here. Ignore loads that are further away
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| DAGCombiner.cpp | 82 cl::desc("DAG combiner may split indexing from loads"));
442 /// Loads that may alias with those stores are placed in AliasLoadNodes.
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.cpp | 141 // Do repeated 4-byte loads and stores. To be improved.
162 // Emit a maximum of 4 loads in Thumb1 since we have fewer registers
165 SDValue Loads[6];
201 // Issue loads / stores for the trailing (1 - 3) bytes.
213 Loads[i] = DAG.getLoad(VT, dl, Chain,
218 TFOps[i] = Loads[i].getValue(1);
237 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
|
| /external/llvm/lib/Analysis/ |
| AliasAnalysisEvaluator.cpp | 149 SetVector<Value *> Loads;
160 Loads.insert(&*I);
225 for (SetVector<Value *>::iterator I1 = Loads.begin(), E = Loads.end();
|
| /external/llvm/lib/Transforms/IPO/ |
| ArgumentPromotion.cpp | 440 // We can only promote this argument if all of the uses are loads, or are GEP
448 // In the former case, invalid loads can happen, but would have happened
449 // anyway, in the latter case, invalid loads won't happen. This prevents us
468 // First, iterate the entry block and mark loads of (geps of) arguments as
479 // This load actually loads (part of) Arg? Check the indices then.
495 // Direct loads are equivalent to a GEP with a single 0 index.
501 // not (GEP+)loads, or any (GEP+)loads that are not safe to promote.
502 SmallVector<LoadInst*, 16> Loads;
508 // Don't hack volatile/atomic loads
[all...] |
| GlobalOpt.cpp | 370 // Loads are ok.
660 /// Return true if all uses of any loads from GV will trap if the loaded value
755 // Replace all uses of loads with uses of uses of the stored value.
760 // If we were able to delete all uses of the loads
785 DEBUG(dbgs() << "OPTIMIZED LOADS FROM STORED ONCE POINTER: " << *GV << "\n");
789 // If we nuked all of the loads, then none of the stores are needed either,
829 /// loads of GV as uses of the new global.
[all...] |
| /external/llvm/lib/CodeGen/ |
| WinEHPrepare.cpp | 71 DenseMap<BasicBlock *, Value *> &Loads, Function &F);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | 126 // Legalize loads and stores to the private address space.
[all...] |
| AMDGPUISelLowering.cpp | 400 // vectors are a legal type, even though we have to split the loads
553 // places trying to reduce the sizes of loads. Shrinking loads to < 32-bits is
678 // properly handle illegal types or vectors. The private vector loads are not
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 718 // Walk the register/memloc assignments, inserting copies/loads.
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
