| /external/lzma/CPP/7zip/Compress/ |
| RangeCoder.h | 21 UInt64 Low;
30 Low = 0;
38 // Low += 1;
47 Low += start * (Range /= total);
58 if ((UInt32)Low < (UInt32)0xFF000000 || (unsigned)(Low >> 32) != 0)
63 Stream.WriteByte((Byte)(temp + (Byte)(Low >> 32)));
67 _cache = (Byte)((UInt32)Low >> 24);
70 Low = (UInt32)Low << 8;
[all...] |
| /external/lzma/CS/7zip/Compress/RangeCoder/ |
| RangeCoder.cs | 11 public UInt64 Low;
32 Low = 0;
56 Low += start * (Range /= total);
67 if ((uint)Low < (uint)0xFF000000 || (uint)(Low >> 32) == 1)
72 Stream.WriteByte((byte)(temp + (Low >> 32)));
76 _cache = (byte)(((uint)Low) >> 24);
79 Low = ((uint)Low) << 8;
88 Low += Range;
[all...] |
| /external/lzma/Java/SevenZip/Compression/RangeCoder/ |
| Encoder.java | 14 long Low;
34 Low = 0;
53 int LowHi = (int)(Low >>> 32);
54 if (LowHi != 0 || Low < 0xFF000000L)
64 _cache = (((int)Low) >>> 24);
67 Low = (Low & 0xFFFFFF) << 8;
76 Low += Range;
113 Low += (newBound & 0xFFFFFFFFL);
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_DecodePadMV_PVOP_s.s | 121 Low RN 2
307 RSB Low,High,#0 ;// Low = -32*scaleFactor
312 CMP diffMVdx,Low ;// If diffMVdx<Low
326 CMP diffMVdx,Low
327 ADDLT diffMVdx,diffMVdx,Range ;// If diffMVdy<Low diffMVdy+=Range
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_DecodePadMV_PVOP_s.s | 121 Low RN 2
307 RSB Low,High,#0 ;// Low = -32*scaleFactor
312 CMP diffMVdx,Low ;// If diffMVdx<Low
326 CMP diffMVdx,Low
327 ADDLT diffMVdx,diffMVdx,Range ;// If diffMVdy<Low diffMVdy+=Range
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.cpp | 401 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::subreg_loreg);
404 TmpInst.addOperand(MCOperand::createReg(Low));
486 unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::subreg_loreg);
489 MappedInst.addOperand(MCOperand::createReg(Low));
498 unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::subreg_loreg);
501 MappedInst.addOperand(MCOperand::createReg(Low));
511 unsigned Low = RI->getSubReg(MO.getReg(), Hexagon::subreg_loreg);
514 MappedInst.addOperand(MCOperand::createReg(Low));
|
| /external/lzma/C/ |
| 7z.h | 71 UInt32 Low;
|
| Ppmd7.h | 126 UInt64 Low;
|
| /external/gemmlowp/meta/generators/ |
| neon_emitter.py | 30 def Low(register):
93 def Low(self, register):
94 return Low(register)
|
| /external/llvm/lib/Transforms/Utils/ |
| LowerSwitch.cpp | 36 int64_t Low, High;
44 // then check if the Low field is <= R.Low. If so, we
49 return I != Ranges.end() && I->Low <= R.Low;
69 ConstantInt* Low;
73 CaseRange(ConstantInt *low, ConstantInt *high, BasicBlock *bb)
74 : Low(low), High(high), BB(bb) {}
98 const ConstantInt* CI1 = cast<const ConstantInt>(C1.Low);
[all...] |
| /external/clang/lib/Basic/ |
| Diagnostic.cpp | 514 unsigned Low = PluralNumber(Start, End);
520 return Low <= Val && Val <= High;
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| LoopAccessAnalysis.h | 384 Low(RtCheck.Pointers[Index].Start) {
404 const SCEV *Low;
|
| /external/llvm/lib/Transforms/IPO/ |
| ArgumentPromotion.cpp | 378 std::set<ArgPromotion::IndicesVector>::iterator Low;
379 Low = Set.upper_bound(Indices);
380 if (Low != Set.begin())
381 Low--;
382 // Low is now the last element smaller than or equal to Indices. This means
387 return Low != Set.end() && IsPrefix(*Low, Indices);
397 std::set<ArgPromotion::IndicesVector>::iterator Low;
398 Low = Safe.upper_bound(ToMark);
400 if (Low != Safe.begin()
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | 151 const ConstantInt *Low, *High;
159 static CaseCluster range(const ConstantInt *Low, const ConstantInt *High,
163 C.Low = Low;
170 static CaseCluster jumpTable(const ConstantInt *Low,
175 C.Low = Low;
182 static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High,
186 C.Low = Low;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 402 SDValue Low = DAG.getLoad(PtrVT, DL, Chain, LowAddr, MachinePointerInfo(),
406 SDValue LowShifted = DAG.getNode(ISD::SRL, DL, MVT::i32, Low, LowShift);
409 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Low.getValue(1),
465 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain,
478 SDValue Result = DAG.getNode(ISD::OR, DL, MVT::i32, Low, HighShifted);
479 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Low.getValue(1),
529 SDValue Low = Value;
532 SDValue StoreLow = DAG.getTruncStore(Chain, dl, Low, BasePtr,
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 387 // Otherwise, if Mask is 0+1+0+, and if B is known to have the low 0+
[all...] |
| /external/llvm/lib/Analysis/ |
| ValueTracking.cpp | 342 // If low bits are zero in either operand, output low known-0 bits.
644 // low max blocks explored). If we can set an high enough limit, this would
[all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | [all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
| strmini.h | 382 Low,
|
| wdm.h | [all...] |
| /external/llvm/lib/IR/ |
| Verifier.cpp | [all...] |
| /external/llvm/tools/dsymutil/ |
| DwarfLinker.cpp | [all...] |
| /external/clang/lib/CodeGen/ |
| CGExpr.cpp | 489 static llvm::Value *emitHash16Bytes(CGBuilderTy &Builder, llvm::Value *Low,
493 llvm::Value *A0 = Builder.CreateMul(Builder.CreateXor(Low, High), KMul);
618 llvm::Value *Low = llvm::ConstantInt::get(Int64Ty, TypeHash);
624 llvm::Value *Hash = emitHash16Bytes(Builder, Low, High);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
