| /external/llvm/include/llvm/CodeGen/ |
| LiveInterval.h | 109 bool isKill() const {
|
| MachineOperand.h | 82 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
93 /// IsKill - True if this instruction is the last use of the register on this
95 bool IsKill : 1;
297 bool isKill() const {
299 return IsKill;
378 IsKill = Val;
542 /// operand. Note: This method ignores isKill and isDead properties.
572 bool isKill = false, bool isDead = false,
598 bool isKill = false, bool isDead = false,
605 assert(!(isKill && isDef) && "Kill flag on def")
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 351 bool isKill = Op.hasOneUse() &&
355 if (isKill) {
363 isKill = false;
366 MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) |
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 151 if (MO.isKill())
160 if (MO.isKill())
210 bool isKill = KilledUseSet.count(Reg);
212 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) |
323 if (MO.isKill())
|
| LiveIntervalAnalysis.cpp | [all...] |
| MachineLICM.cpp | 761 return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
827 bool isKill = isOperandKill(MO, MRI);
828 if (isNew && !isKill && ConsiderUnseenAsDef)
831 else if (!isNew && isKill)
[all...] |
| TwoAddressInstructionPass.cpp | 237 if (!UseMO.isKill())
280 if (MO.isKill() || (LIS && isPlainlyKilled(OtherMI, MOReg, LIS))) {
882 if (MOReg != Reg && (MO.isKill() ||
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 588 bool isKill = true;
597 isKill = false;
600 if (isKill)
603 MIB.addReg(Reg, getKillRegState(isKill));
|
| ARMFrameLowering.cpp | [all...] |
| ARMBaseInstrInfo.cpp | 255 if (MO.isUse() && MO.isKill()) {
847 unsigned SrcReg, bool isKill, int FI,
864 .addReg(SrcReg, getKillRegState(isKill))
868 .addReg(SrcReg, getKillRegState(isKill))
876 .addReg(SrcReg, getKillRegState(isKill))
881 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
892 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
904 .addReg(SrcReg, getKillRegState(isKill))
908 .addReg(SrcReg, getKillRegState(isKill))
921 .addReg(SrcReg, getKillRegState(isKill))
[all...] |
| ARMFastISel.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSplitDouble.cpp | 116 getKillRegState(R.isKill()) |
576 bool isKill = Op.isKill();
578 isKill = false;
588 auto CO = MachineOperand::CreateReg(R, Op.isDef(), Op.isImplicit(), isKill,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
