| /external/clang/test/Misc/ |
| diag-special-chars.c | 7 #error Hi Bye
8 //expected-error@-1 {{Hi Bye}}
10 // CHECK: error: Hi Bye
11 // CHECK: #error Hi <U+007F> Bye
|
| /external/valgrind/none/tests/ |
| pth_once.stdout.exp | 2 identify_yourself: Hi, I'm a thread
3 identify_yourself: Hi, I'm a thread
4 identify_yourself: Hi, I'm a thread
5 identify_yourself: Hi, I'm a thread
6 identify_yourself: Hi, I'm a thread
7 identify_yourself: Hi, I'm a thread
8 identify_yourself: Hi, I'm a thread
9 identify_yourself: Hi, I'm a thread
10 identify_yourself: Hi, I'm a thread
11 identify_yourself: Hi, I'm a threa
[all...] |
| /external/valgrind/drd/tests/ |
| tc21_pthonce.stdout.exp | 3 child: Hi, I'm thread 0
4 child: Hi, I'm thread 1
|
| /external/valgrind/helgrind/tests/ |
| tc21_pthonce.stdout.exp | 3 child: Hi, I'm thread 0
4 child: Hi, I'm thread 1
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.h | 182 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
196 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
198 SDValue &Lo, SDValue &Hi);
327 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
330 /// Op, and Hi being equal to the upper 32 bits.
331 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
332 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
336 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
337 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
338 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
[all...] |
| LegalizeTypesGeneric.cpp | 14 // computation in two identical registers of a smaller type. The Lo/Hi part
32 // These routines assume that the Lo/Hi part is stored first in memory on
33 // little/big-endian machines, followed by the Hi/Lo part. This means that
36 SDValue &Lo, SDValue &Hi) {
38 GetExpandedOp(Op, Lo, Hi);
41 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
62 SplitInteger(SoftenedOp, Lo, Hi);
64 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
71 GetExpandedOp(InOp, Lo, Hi);
[all...] |
| LegalizeIntegerTypes.cpp | 281 SDValue Lo, Hi;
282 GetSplitVector(N->getOperand(0), Lo, Hi);
284 Hi = BitConvertToInteger(Hi);
287 std::swap(Lo, Hi);
292 JoinIntegers(Lo, Hi));
783 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul,
786 Overflow = DAG.getSetCC(DL, N->getValueType(1), Hi,
787 DAG.getConstant(0, DL, Hi.getValueType()),
[all...] |
| LegalizeFloatTypes.cpp | [all...] |
| LegalizeVectorTypes.cpp | 576 SDValue Lo, Hi;
592 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
594 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
595 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
596 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
597 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
598 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
599 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
600 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
601 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break
[all...] |
| LegalizeTypes.cpp | 810 SDValue &Hi) {
816 Hi = Entry.second;
820 SDValue Hi) {
[all...] |
| LegalizeDAG.cpp | 416 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
421 DAG.getDataLayout().isLittleEndian() ? Lo : Hi,
430 Chain, dl, DAG.getDataLayout().isLittleEndian() ? Hi : Lo, Ptr,
547 // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD.
552 SDValue Lo, Hi;
560 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr,
566 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(),
581 DAG.getConstant(NumBits, dl, TLI.getShiftAmountTy(Hi.getValueType(),
583 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
587 Hi.getValue(1))
[all...] |
| LegalizeVectorOps.cpp | 572 SDValue Lo, Hi, ShAmt;
589 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt);
590 Hi = DAG.getNode(ISD::AND, dl, WideVT, Hi, SrcEltBitMask);
594 if (Hi.getNode())
595 Lo = DAG.getNode(ISD::OR, dl, WideVT, Lo, Hi);
[all...] |
| /external/llvm/include/llvm/Support/ |
| SwapByteOrder.h | 34 uint16_t Hi = value << 8;
36 return Hi | Lo;
64 uint64_t Hi = SwapByteOrder_32(uint32_t(value));
66 return (Hi << 32) | Lo;
|
| GCOV.h | 198 uint32_t Lo, Hi;
199 if (!readInt(Lo) || !readInt(Hi))
201 Val = ((uint64_t)Hi << 32) | Lo;
|
| /external/webrtc/webrtc/common_audio/signal_processing/ |
| spl_sqrt_floor_arm.S | 9 @ Hi Kevin,
20 @ Hi Wilco,
|
| /external/llvm/include/llvm/IR/ |
| MDBuilder.h | 73 /// \brief Return metadata describing the range [Lo, Hi).
74 MDNode *createRange(const APInt &Lo, const APInt &Hi);
76 /// \brief Return metadata describing the range [Lo, Hi).
77 MDNode *createRange(Constant *Lo, Constant *Hi);
|
| /external/llvm/lib/IR/ |
| MDBuilder.cpp | 66 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) {
67 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!");
70 return createRange(ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi));
73 MDNode *MDBuilder::createRange(Constant *Lo, Constant *Hi) {
75 if (Hi == Lo)
78 // Return the range [Lo, Hi).
79 return MDNode::get(Context, {createConstant(Lo), createConstant(Hi)});
|
| /external/llvm/lib/MC/ |
| MCObjectStreamer.cpp | 57 void MCObjectStreamer::emitAbsoluteSymbolDiff(const MCSymbol *Hi,
61 if (!Hi->getFragment() || Hi->getFragment() != Lo->getFragment() ||
62 Hi->isVariable() || Lo->isVariable()) {
63 MCStreamer::emitAbsoluteSymbolDiff(Hi, Lo, Size);
67 assert(Hi->getOffset() >= Lo->getOffset() &&
68 "Expected Hi to be greater than Lo");
69 EmitIntValue(Hi->getOffset() - Lo->getOffset(), Size);
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 41 // No relation with Mips Hi register
42 Hi,
334 // (load (wrapper (add %hi(sym), $gp), %lo(sym)))
340 SDValue Hi =
341 DAG.getNode(MipsISD::Hi, DL, Ty, getTargetNode(N, Ty, DAG, HiFlag));
342 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty));
343 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi,
352 // (add %hi(sym), %lo(sym))
356 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI)
[all...] |
| Mips16ISelDAGToDAG.cpp | 49 SDNode *Lo = nullptr, *Hi = nullptr;
61 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
63 return std::make_pair(Lo, Hi);
211 // lui $2, %hi($CPI1_0)
215 // lui $2, %hi($CPI1_0)
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 577 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl,
580 SDValue Lo(Hi.getNode(), 1);
581 SDValue Ops[] = { Lo, Hi };
594 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl,
597 SDValue Lo(Hi.getNode(), 1);
598 SDValue Ops[] = { Lo, Hi };
691 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl,
694 SDValue Lo(Hi.getNode(), 1);
695 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
699 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl
[all...] |
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIFrameLowering.cpp | 181 unsigned Hi = TRI->getSubReg(PreloadedPrivateBufferReg, AMDGPU::sub2_sub3);
188 .addReg(Hi, RegState::Kill);
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| armv8-a-it-bad.l | 10 .*:52: Warning: IT blocks containing 16-bit Thumb instructions of the following class are deprecated in ARMv8: Hi-register ADD, MOV, CMP, BX, BLX using pc
|
| /external/llvm/include/llvm/MC/ |
| MCObjectStreamer.h | 134 /// Emit the absolute difference between \c Hi and \c Lo, as long as we can
138 /// \pre Offset of \c Hi is greater than the offset \c Lo.
139 void emitAbsoluteSymbolDiff(const MCSymbol *Hi, const MCSymbol *Lo,
|
