/external/llvm/lib/CodeGen/SelectionDAG/ |
FastISel.cpp | 382 bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { 395 if (VT == MVT::i1 && (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR || 396 ISDOpcode == ISD::XOR)) 412 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, 432 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) && 435 ISDOpcode = ISD::SRA; 439 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) && 442 ISDOpcode = ISD::AND; 445 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0 [all...] |
/external/llvm/include/llvm/CodeGen/ |
FastISel.h | 526 bool selectBinaryOp(const User *I, unsigned ISDOpcode);
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/external/llvm/lib/Target/ARM/ |
ARMTargetTransformInfo.cpp | 392 int ISDOpcode = TLI->InstructionOpcodeToISD(Opcode); 439 if (const auto *Entry = CostTableLookup(CostTbl, ISDOpcode, LT.second))
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ARMFastISel.cpp | 151 bool SelectBinaryIntOp(const Instruction *I, unsigned ISDOpcode); 152 bool SelectBinaryFPOp(const Instruction *I, unsigned ISDOpcode); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsFastISel.cpp | 108 bool selectDivRem(const Instruction *I, unsigned ISDOpcode); [all...] |
/external/llvm/lib/CodeGen/ |
CodeGenPrepare.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | 138 bool SelectBinaryIntOp(const Instruction *I, unsigned ISDOpcode); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FastISel.cpp | 128 bool selectRem(const Instruction *I, unsigned ISDOpcode); [all...] |