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  /external/e2fsprogs/lib/ext2fs/
icount.c 34 * one, and then use a sorted list to store the counts for inodes
652 #define STORE 0x02
664 { STORE, 42, 42, 42 },
665 { STORE, 1, 1, 1 },
666 { STORE, 2, 2, 2 },
667 { STORE, 3, 3, 3 },
668 { STORE, 10, 1, 1 },
669 { STORE, 42, 0, 0 },
690 { STORE, 1, 1, 1 },
691 { STORE, 2, 2, 2 }
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  /external/bison/lib/
quotearg.c 233 If BUFFERSIZE is too small to store the output string, return the
257 #define STORE(c) \
274 STORE ('"');
317 STORE (*quote_string);
330 STORE ('\'');
367 STORE ('\\');
375 STORE ('0');
376 STORE ('0');
410 STORE ('?');
411 STORE ('"');
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  /external/elfutils/libelf/
gelf_xlate.c 68 #define STORE(Bits, ptr, val) (*(uint##Bits##_t *) ptr = val)
80 #define STORE(Bits, ptr, val) (((union unaligned *) ptr)->u##Bits = val)
99 case 2: STORE (16, dest, bswap_16 (FETCH (16, ptr))); break; \
100 case 4: STORE (32, dest, bswap_32 (FETCH (32, ptr))); break; \
101 case 8: STORE (64, dest, bswap_64 (FETCH (64, ptr))); break; \
  /toolchain/binutils/binutils-2.25/bfd/
coff-sh.c 698 a load or store instruction is not aligned on a four byte boundary,
701 align load and store instructions on four byte boundaries if we
996 /* Look for load and store instructions that we can align on four
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  /external/boringssl/src/crypto/chacha/
chacha_vec.c 53 #define STORE(m, r) ({ \
85 #define STORE(m, r) _mm_storeu_si128((__m128i *)(m), (__m128i)(r))
140 STORE(op + d + 0, LOAD(in + d + 0) ^ REVV_BE(v0)); \
141 STORE(op + d + 4, LOAD(in + d + 4) ^ REVV_BE(v1)); \
142 STORE(op + d + 8, LOAD(in + d + 8) ^ REVV_BE(v2)); \
143 STORE(op + d +12, LOAD(in + d +12) ^ REVV_BE(v3));
299 STORE(op + 0, LOAD(ip + 0) ^ REVV_BE(v0 + s0));
302 STORE(op + 4, LOAD(ip + 4) ^ REVV_BE(v1 + s1));
305 STORE(op + 8, LOAD(ip + 8) ^
  /external/v8/src/compiler/
machine-operator.cc 282 #define STORE(Type) \
283 struct Store##Type##Operator : public Operator1<StoreRepresentation> { \
284 explicit Store##Type##Operator(WriteBarrierKind write_barrier_kind) \
287 "Store", 3, 1, 1, 0, 1, 0, \
291 struct Store##Type##NoWriteBarrier##Operator final \
292 : public Store##Type##Operator { \
293 Store##Type##NoWriteBarrier##Operator() \
294 : Store##Type##Operator(kNoWriteBarrier) {} \
296 struct Store##Type##MapWriteBarrier##Operator final \
297 : public Store##Type##Operator {
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  /external/webp/src/dsp/
dec.c 26 #define STORE(x, y, v) \
31 STORE(0, y, DC + (d)); \
32 STORE(1, y, DC + (c)); \
33 STORE(2, y, DC - (c)); \
34 STORE(3, y, DC - (d)); \
70 STORE(0, 0, a + d);
71 STORE(1, 0, b + c);
72 STORE(2, 0, b - c);
73 STORE(3, 0, a - d);
112 STORE(i, j, DC)
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enc.c 103 #define STORE(x, y, v) \
135 STORE(0, i, a + d);
136 STORE(1, i, b + c);
137 STORE(2, i, b - c);
138 STORE(3, i, a - d);
216 #undef STORE
  /packages/apps/Email/provider_src/com/android/email/mail/store/imap/
ImapConstants.java 17 package com.android.email.mail.store.imap;
19 import com.android.email.mail.Store;
29 = String.format(Locale.US, "BODY.PEEK[]<0.%d>", Store.FETCH_BODY_SANE_SUGGESTED_SIZE);
82 public static final String STORE = "STORE";
90 public static final String UID_STORE = "UID STORE";
  /packages/services/Telephony/src/com/android/phone/common/mail/store/imap/
ImapConstants.java 17 package com.android.phone.common.mail.store.imap;
19 import com.android.phone.common.mail.store.ImapStore;
82 public static final String STORE = "STORE";
90 public static final String UID_STORE = "UID STORE";
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/
regression.s 76 /*LOAD-STORE DISPLACEMENT */
84 NEXT: STRB R4,[R0,#0x0] ;//Store Byte
88 STOREB: STRB R5,[R0,#0xf] ;//Store Byte
92 STORES: STRH R4,[R0,#0x0] ;//Store Short
96 STORES2: STRH R5,[R0,#0xe] ;//Store Short
98 VERIFY R63,R63,R5,STORE ;
100 STORE: STR R4,[R0,#0x0] ;//Store Word
104 STORE2: STR R5,[R0,#0xc] ;//Store Word
110 /*LOAD-STORE INDEX *
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  /external/pcre/dist/sljit/
sljitNativeARM_64.c 767 #define STORE 0x01
922 tmp_r = (flags & STORE) ? TMP_REG3 : reg;
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sljitNativeARM_T2_32.c 788 #define STORE 0x01
813 s = store
964 FAIL_IF(push_inst16(compiler, STR_SP | ((flags & STORE) ? 0 : 0x800) | RDN3(reg) | (argw >> 2)));
1014 tmp_r = (flags & STORE) ? TMP_REG3 : reg;
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  /external/opencv3/3rdparty/libwebp/dsp/
dec.c 61 #define STORE(x, y, v) \
98 STORE(0, 0, a + d);
99 STORE(1, 0, b + c);
100 STORE(2, 0, b - c);
101 STORE(3, 0, a - d);
125 STORE(i, j, DC);
137 #undef STORE
enc.c 87 #define STORE(x, y, v) \
119 STORE(0, i, a + d);
120 STORE(1, i, b + c);
121 STORE(2, i, b - c);
122 STORE(3, i, a - d);
222 #undef STORE
  /external/llvm/lib/Target/Mips/
MipsISelDAGToDAG.cpp 68 /// Used on Mips Load/Store instructions
213 case ISD::STORE:
  /external/mockito/cglib-and-asm/src/org/mockito/asm/
Label.java 73 static final int STORE = 32;
116 * @see #STORE
146 * as a bitset to store the subroutines to which a basic block belongs. This
347 * small to store the offset. In such a case the corresponding jump
  /external/llvm/test/MC/Mips/
cprestore-noreorder.s 6 # RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE
35 # CHECK-FOR-STORE: sw $gp, 8($sp)
cprestore-reorder.s 6 # RUN: FileCheck %s -check-prefix=CHECK-FOR-STORE
36 # CHECK-FOR-STORE: sw $gp, 8($sp)
  /external/mp4parser/isoparser/src/main/java/com/googlecode/mp4parser/authoring/tracks/
H264TrackImpl.java 223 IGNORE, BUFFER, STORE, END
261 case STORE:
352 action = NALActions.STORE; // Will only work in single slice per frame mode!
  /frameworks/opt/telephony/src/java/com/google/android/mms/pdu/
PduHeaders.java 65 public static final int STORE = 0xA2;
130 * X-Mms-Store |
310 * X-Mms-Store-Status field types.
372 case STORE:
  /packages/apps/Messaging/src/android/support/v7/mms/pdu/
PduHeaders.java 63 public static final int STORE = 0xA2;
128 * X-Mms-Store |
308 * X-Mms-Store-Status field types.
370 case STORE:
  /packages/apps/Messaging/src/com/android/messaging/mmslib/pdu/
PduHeaders.java 66 public static final int STORE = 0xA2;
131 * X-Mms-Store |
328 * X-Mms-Store-Status field types.
390 case STORE:
  /external/llvm/include/llvm/CodeGen/
ISDOpcodes.h 228 /// indicates if an overflow occurred (*not* a flag, because it may be store
531 /// LOAD and STORE have token chains as their first operand, then the same
532 /// operands as an LLVM load/store instruction, then an offset node that
535 LOAD, STORE,
696 /// This corresponds to "store atomic" instruction.
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  /external/llvm/lib/Target/AMDGPU/
AMDGPUISelLowering.cpp 46 // Find a larger type to do a load / store of a vector with.
52 assert(StoreSize % 32 == 0 && "Store size not a multiple of 32");
108 // Lower floating point store/load to integer store/load to reduce the number
110 setOperationAction(ISD::STORE, MVT::f32, Promote);
111 AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32);
113 setOperationAction(ISD::STORE, MVT::v2f32, Promote);
114 AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32);
116 setOperationAction(ISD::STORE, MVT::v4f32, Promote);
117 AddPromotedToType(ISD::STORE, MVT::v4f32, MVT::v4i32)
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