1 /****************************************************************************** 2 * 3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 /** 19 ******************************************************************************* 20 * @file 21 * ihevcd_process_slice.c 22 * 23 * @brief 24 * Contains functions for processing slice data 25 * 26 * @author 27 * Harish 28 * 29 * @par List of Functions: 30 * 31 * @remarks 32 * None 33 * 34 ******************************************************************************* 35 */ 36 /*****************************************************************************/ 37 /* File Includes */ 38 /*****************************************************************************/ 39 #include <stdio.h> 40 #include <stddef.h> 41 #include <stdlib.h> 42 #include <string.h> 43 #include <assert.h> 44 45 #include "ihevc_typedefs.h" 46 #include "iv.h" 47 #include "ivd.h" 48 #include "ihevcd_cxa.h" 49 #include "ithread.h" 50 51 #include "ihevc_defs.h" 52 #include "ihevc_debug.h" 53 #include "ihevc_defs.h" 54 #include "ihevc_structs.h" 55 #include "ihevc_macros.h" 56 #include "ihevc_platform_macros.h" 57 #include "ihevc_cabac_tables.h" 58 #include "ihevc_padding.h" 59 #include "ihevc_iquant_itrans_recon.h" 60 #include "ihevc_chroma_iquant_itrans_recon.h" 61 #include "ihevc_recon.h" 62 #include "ihevc_chroma_recon.h" 63 #include "ihevc_iquant_recon.h" 64 #include "ihevc_chroma_iquant_recon.h" 65 #include "ihevc_intra_pred.h" 66 67 #include "ihevc_error.h" 68 #include "ihevc_common_tables.h" 69 #include "ihevc_quant_tables.h" 70 #include "ihevcd_common_tables.h" 71 72 #include "ihevcd_profile.h" 73 #include "ihevcd_trace.h" 74 #include "ihevcd_defs.h" 75 #include "ihevcd_function_selector.h" 76 #include "ihevcd_structs.h" 77 #include "ihevcd_error.h" 78 #include "ihevcd_nal.h" 79 #include "ihevcd_bitstream.h" 80 #include "ihevcd_job_queue.h" 81 #include "ihevcd_utils.h" 82 #include "ihevcd_debug.h" 83 #include "ihevcd_get_mv.h" 84 #include "ihevcd_inter_pred.h" 85 #include "ihevcd_iquant_itrans_recon_ctb.h" 86 #include "ihevcd_boundary_strength.h" 87 #include "ihevcd_deblk.h" 88 #include "ihevcd_fmt_conv.h" 89 #include "ihevcd_sao.h" 90 #include "ihevcd_profile.h" 91 92 IHEVCD_ERROR_T ihevcd_fmt_conv(codec_t *ps_codec, 93 process_ctxt_t *ps_proc, 94 UWORD8 *pu1_y_dst, 95 UWORD8 *pu1_u_dst, 96 UWORD8 *pu1_v_dst, 97 WORD32 cur_row, 98 WORD32 num_rows); 99 100 typedef enum 101 { 102 PROC_ALL, 103 PROC_INTER_PRED, 104 PROC_RECON, 105 PROC_DEBLK, 106 PROC_SAO 107 }proc_type_t; 108 109 void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb) 110 { 111 tile_t *ps_tile = ps_proc->ps_tile; 112 sps_t *ps_sps = ps_proc->ps_sps; 113 pps_t *ps_pps = ps_proc->ps_pps; 114 codec_t *ps_codec = ps_proc->ps_codec; 115 WORD32 idx; 116 WORD32 nop_cnt; 117 WORD32 bit_pos = proc_type; 118 WORD32 bit_mask = (1 << bit_pos); 119 120 if(ps_proc->i4_check_proc_status) 121 { 122 nop_cnt = PROC_NOP_CNT; 123 while(1) 124 { 125 volatile UWORD8 *pu1_buf; 126 volatile WORD32 status; 127 status = 1; 128 /* Check if all dependencies for the next nCTBs are met */ 129 { 130 WORD32 x_pos; 131 132 { 133 /* Check if the top right of next nCTBs are processed */ 134 if(ps_proc->i4_ctb_y > 0) 135 { 136 x_pos = (ps_proc->i4_ctb_tile_x + nctb); 137 idx = MIN(x_pos, (ps_tile->u2_wd - 1)); 138 139 /* Check if top-right CTB for the last CTB in nCTB is within the tile */ 140 { 141 idx += ps_tile->u1_pos_x; 142 idx += ((ps_proc->i4_ctb_y - 1) 143 * ps_sps->i2_pic_wd_in_ctb); 144 pu1_buf = (ps_codec->pu1_proc_map + idx); 145 status = *pu1_buf & bit_mask; 146 } 147 } 148 } 149 150 /* If tiles are enabled, then test left and top-left as well */ 151 ps_pps = ps_proc->ps_pps; 152 if(ps_pps->i1_tiles_enabled_flag) 153 { 154 /*Check if left ctb is processed*/ 155 if((ps_proc->i4_ctb_x > 0) && ((0 != status))) 156 { 157 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1; 158 idx = x_pos + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb); 159 pu1_buf = (ps_codec->pu1_proc_map + idx); 160 status = *pu1_buf & bit_mask; 161 } 162 163 /*Check if top left ctb is processed*/ 164 if((ps_proc->i4_ctb_x > 0) && (0 != status) && (ps_proc->i4_ctb_y > 0)) 165 { 166 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1; 167 idx = x_pos + ((ps_proc->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb); 168 pu1_buf = (ps_codec->pu1_proc_map + idx); 169 status = *pu1_buf & bit_mask; 170 } 171 } 172 } 173 174 if(status) 175 break; 176 177 /* if dependencies are not met, then wait for few cycles. 178 * Even after few iterations, if the dependencies are not met then yield 179 */ 180 if(nop_cnt > 0) 181 { 182 NOP(128); 183 nop_cnt -= 128; 184 } 185 else 186 { 187 nop_cnt = PROC_NOP_CNT; 188 ithread_yield(); 189 //NOP(128 * 16); 190 } 191 } 192 } 193 } 194 195 void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb) 196 { 197 codec_t *ps_codec = ps_proc->ps_codec; 198 WORD32 i, idx; 199 WORD32 bit_pos = proc_type; 200 WORD32 bit_mask = (1 << bit_pos); 201 202 /* Update the current CTBs processing status */ 203 if(ps_proc->i4_check_proc_status) 204 { 205 for(i = 0; i < nctb; i++) 206 { 207 sps_t *ps_sps = ps_proc->ps_sps; 208 UWORD8 *pu1_buf; 209 idx = (ps_proc->i4_ctb_x + i); 210 idx += ((ps_proc->i4_ctb_y) * ps_sps->i2_pic_wd_in_ctb); 211 pu1_buf = (ps_codec->pu1_proc_map + idx); 212 *pu1_buf = *pu1_buf | bit_mask; 213 } 214 } 215 } 216 217 218 void ihevcd_slice_hdr_update(process_ctxt_t *ps_proc) 219 { 220 221 /* Slice x and y are initialized in proc_init. But initialize slice x and y count here 222 * if a new slice begins at the middle of a row since proc_init is invoked only at the beginning of each row */ 223 if(!((ps_proc->i4_ctb_x == 0) && (ps_proc->i4_ctb_y == 0))) 224 { 225 slice_header_t *ps_slice_hdr_next = ps_proc->ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx + 1) & (MAX_SLICE_HDR_CNT - 1)); 226 227 if((ps_slice_hdr_next->i2_ctb_x == ps_proc->i4_ctb_x) 228 && (ps_slice_hdr_next->i2_ctb_y == ps_proc->i4_ctb_y)) 229 { 230 if(0 == ps_slice_hdr_next->i1_dependent_slice_flag) 231 { 232 ps_proc->i4_ctb_slice_x = 0; 233 ps_proc->i4_ctb_slice_y = 0; 234 } 235 236 ps_proc->i4_cur_slice_idx++; 237 ps_proc->ps_slice_hdr = ps_slice_hdr_next; 238 } 239 240 } 241 } 242 243 void ihevcd_ctb_pos_update(process_ctxt_t *ps_proc, WORD32 nctb) 244 { 245 WORD32 tile_start_ctb_idx, slice_start_ctb_idx; 246 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 247 tile_t *ps_tile = ps_proc->ps_tile; 248 sps_t *ps_sps = ps_proc->ps_sps; 249 250 /* Update x and y positions */ 251 ps_proc->i4_ctb_tile_x += nctb; 252 ps_proc->i4_ctb_x += nctb; 253 254 ps_proc->i4_ctb_slice_x += nctb; 255 /*If tile are enabled, then handle the tile & slice counters differently*/ 256 if(ps_proc->ps_pps->i1_tiles_enabled_flag) 257 { 258 /* Update slice counters*/ 259 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 260 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 261 /* 262 * There can be 2 cases where slice counters must be handled differently. 263 * 1 - Multiple tiles span across a single/one of the many slice. 264 * 2 - Multiple slices span across a single/one of the many tiles. 265 */ 266 267 /*Case 1 */ 268 if(slice_start_ctb_idx < tile_start_ctb_idx) 269 { 270 /*End of tile row*/ 271 if(ps_proc->i4_ctb_x > ps_slice_hdr->i2_ctb_x) 272 { 273 if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd + ps_tile->u1_pos_x)) 274 { 275 ps_proc->i4_ctb_slice_y++; 276 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 277 - ps_tile->u2_wd; 278 } 279 } 280 else 281 { 282 WORD32 temp_stride = (ps_sps->i2_pic_wd_in_ctb - ps_slice_hdr->i2_ctb_x); 283 if(ps_proc->i4_ctb_slice_x >= (temp_stride + ps_tile->u2_wd + ps_tile->u1_pos_x)) 284 { 285 ps_proc->i4_ctb_slice_y++; 286 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 287 - ps_tile->u2_wd; 288 } 289 } 290 } 291 /*Case 2*/ 292 else if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd)) 293 { 294 /*End of tile row*/ 295 ps_proc->i4_ctb_slice_y++; 296 ps_proc->i4_ctb_slice_x = 0; 297 } 298 } 299 else 300 { 301 if(ps_proc->i4_ctb_slice_x >= ps_tile->u2_wd) 302 { 303 ps_proc->i4_ctb_slice_y++; 304 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 305 - ps_tile->u2_wd; 306 } 307 } 308 } 309 310 void ihevcd_ctb_avail_update(process_ctxt_t *ps_proc) 311 { 312 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 313 sps_t *ps_sps = ps_proc->ps_sps; 314 tile_t *ps_tile_prev; 315 tile_t *ps_tile = ps_proc->ps_tile; 316 WORD32 cur_pu_idx; 317 WORD32 tile_start_ctb_idx, slice_start_ctb_idx; 318 WORD16 i2_wd_in_ctb; 319 WORD32 continuous_tiles = 0; 320 WORD32 cur_ctb_idx; 321 WORD32 check_tile_wd; 322 323 if((0 != ps_tile->u1_pos_x) && (0 != ps_tile->u1_pos_y)) 324 { 325 ps_tile_prev = ps_tile - 1; 326 } 327 else 328 { 329 ps_tile_prev = ps_tile; 330 } 331 332 333 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd; 334 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x)) 335 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x)))) 336 { 337 continuous_tiles = 1; 338 } 339 340 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 341 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 342 343 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles)) 344 { 345 //Slices span across multiple tiles. 346 i2_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb; 347 } 348 else 349 { 350 i2_wd_in_ctb = ps_tile->u2_wd; 351 } 352 cur_ctb_idx = ps_proc->i4_ctb_x 353 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 354 355 /* Ctb level availability */ 356 /* Bottom left will not be available at a CTB level, no need to pass this */ 357 ps_proc->u1_top_ctb_avail = 1; 358 ps_proc->u1_left_ctb_avail = 1; 359 ps_proc->u1_top_lt_ctb_avail = 1; 360 ps_proc->u1_top_rt_ctb_avail = 1; 361 /* slice and tile boundaries */ 362 363 if((0 == ps_proc->i4_ctb_y) || (0 == ps_proc->i4_ctb_tile_y)) 364 { 365 ps_proc->u1_top_ctb_avail = 0; 366 ps_proc->u1_top_lt_ctb_avail = 0; 367 ps_proc->u1_top_rt_ctb_avail = 0; 368 } 369 370 if((0 == ps_proc->i4_ctb_x) || (0 == ps_proc->i4_ctb_tile_x)) 371 { 372 ps_proc->u1_left_ctb_avail = 0; 373 ps_proc->u1_top_lt_ctb_avail = 0; 374 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y)) 375 { 376 ps_proc->u1_top_ctb_avail = 0; 377 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x) 378 { 379 ps_proc->u1_top_rt_ctb_avail = 0; 380 } 381 } 382 } 383 /*For slices not beginning at start of a ctb row*/ 384 else if(ps_proc->i4_ctb_x > 0) 385 { 386 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y)) 387 { 388 ps_proc->u1_top_ctb_avail = 0; 389 ps_proc->u1_top_lt_ctb_avail = 0; 390 if(0 == ps_proc->i4_ctb_slice_x) 391 { 392 ps_proc->u1_left_ctb_avail = 0; 393 } 394 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x) 395 { 396 ps_proc->u1_top_rt_ctb_avail = 0; 397 } 398 } 399 else if((1 == ps_proc->i4_ctb_slice_y) && (0 == ps_proc->i4_ctb_slice_x)) 400 { 401 ps_proc->u1_top_lt_ctb_avail = 0; 402 } 403 } 404 405 if((ps_proc->i4_ctb_x == (ps_sps->i2_pic_wd_in_ctb - 1)) || ((ps_tile->u2_wd - 1) == ps_proc->i4_ctb_tile_x)) 406 { 407 ps_proc->u1_top_rt_ctb_avail = 0; 408 } 409 410 411 { 412 WORD32 next_ctb_idx; 413 next_ctb_idx = cur_ctb_idx + 1; 414 415 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 416 { 417 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 418 { 419 //Last tile 420 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 421 { 422 next_ctb_idx = cur_ctb_idx + 1; 423 } 424 else //Not last tile, but new tile 425 { 426 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 427 next_ctb_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 428 } 429 } 430 else //End of each tile row 431 { 432 next_ctb_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 433 } 434 } 435 ps_proc->i4_next_pu_ctb_cnt = next_ctb_idx; 436 ps_proc->i4_ctb_pu_cnt = 437 ps_proc->pu4_pic_pu_idx[next_ctb_idx] 438 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 439 cur_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 440 ps_proc->i4_ctb_start_pu_idx = cur_pu_idx; 441 ps_proc->ps_pu = &ps_proc->ps_pic_pu[cur_pu_idx]; 442 } 443 } 444 445 void ihevcd_update_ctb_tu_cnt(process_ctxt_t *ps_proc) 446 { 447 sps_t *ps_sps = ps_proc->ps_sps; 448 codec_t *ps_codec = ps_proc->ps_codec; 449 WORD32 cur_ctb_idx; 450 451 cur_ctb_idx = ps_proc->i4_ctb_x 452 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 453 454 { 455 tile_t *ps_tile; 456 WORD32 next_ctb_tu_idx; 457 ps_tile = ps_proc->ps_tile; 458 459 460 if(1 == ps_codec->i4_num_cores) 461 { 462 next_ctb_tu_idx = cur_ctb_idx % RESET_TU_BUF_NCTB + 1; 463 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 464 { 465 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 466 { 467 //Last tile 468 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 469 { 470 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1; 471 } 472 else //Not last tile, but new tile 473 { 474 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 475 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 476 } 477 } 478 else //End of each tile row 479 { 480 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 481 } 482 } 483 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx; 484 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - ps_proc->pu4_pic_tu_idx[cur_ctb_idx % RESET_TU_BUF_NCTB]; 485 } 486 else 487 { 488 next_ctb_tu_idx = cur_ctb_idx + 1; 489 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 490 { 491 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 492 { 493 //Last tile 494 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 495 { 496 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1; 497 } 498 else //Not last tile, but new tile 499 { 500 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 501 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 502 } 503 } 504 else //End of each tile row 505 { 506 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 507 } 508 } 509 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx; 510 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - 511 ps_proc->pu4_pic_tu_idx[cur_ctb_idx]; 512 } 513 } 514 } 515 516 IHEVCD_ERROR_T ihevcd_process(process_ctxt_t *ps_proc) 517 { 518 IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS; 519 codec_t *ps_codec; 520 sps_t *ps_sps = ps_proc->ps_sps; 521 522 WORD32 nctb; 523 WORD32 i; 524 WORD32 idx; 525 WORD32 nop_cnt; 526 WORD32 num_minpu_in_ctb; 527 WORD32 cur_slice_idx, cur_ctb_tile_x, cur_ctb_slice_x, cur_ctb_tile_y, cur_ctb_slice_y; 528 WORD32 nxt_ctb_slice_y, nxt_ctb_slice_x; 529 tu_t *ps_tu_cur, *ps_tu_nxt; 530 UWORD8 *pu1_pu_map_cur, *pu1_pu_map_nxt; 531 WORD32 num_ctb, num_ctb_tmp; 532 proc_type_t proc_type; 533 534 535 WORD32 ctb_size = 1 << ps_sps->i1_log2_ctb_size; 536 537 PROFILE_DISABLE_PROCESS_CTB(); 538 539 ps_codec = ps_proc->ps_codec; 540 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 541 542 nctb = MIN(ps_codec->i4_proc_nctb, ps_proc->i4_ctb_cnt); 543 nctb = MIN(nctb, (ps_proc->ps_tile->u2_wd - ps_proc->i4_ctb_tile_x)); 544 545 if(ps_proc->i4_cur_slice_idx > (MAX_SLICE_HDR_CNT - 2 * ps_sps->i2_pic_wd_in_ctb)) 546 { 547 num_ctb = 1; 548 } 549 else 550 { 551 num_ctb = ps_proc->i4_nctb; 552 } 553 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y; 554 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x; 555 pu1_pu_map_nxt = ps_proc->pu1_pu_map; 556 ps_tu_nxt = ps_proc->ps_tu; 557 558 while(ps_proc->i4_ctb_cnt) 559 { 560 ps_proc->i4_ctb_slice_y = nxt_ctb_slice_y; 561 ps_proc->i4_ctb_slice_x = nxt_ctb_slice_x; 562 ps_proc->pu1_pu_map = pu1_pu_map_nxt; 563 ps_proc->ps_tu = ps_tu_nxt; 564 565 cur_ctb_tile_x = ps_proc->i4_ctb_tile_x; 566 cur_ctb_tile_y = ps_proc->i4_ctb_tile_y; 567 cur_ctb_slice_x = ps_proc->i4_ctb_slice_x; 568 cur_ctb_slice_y = ps_proc->i4_ctb_slice_y; 569 cur_slice_idx = ps_proc->i4_cur_slice_idx; 570 ps_tu_cur = ps_proc->ps_tu; 571 pu1_pu_map_cur = ps_proc->pu1_pu_map; 572 proc_type = PROC_INTER_PRED; 573 574 if(ps_proc->i4_ctb_cnt < num_ctb) 575 { 576 num_ctb = ps_proc->i4_ctb_cnt; 577 } 578 num_ctb_tmp = num_ctb; 579 580 while(num_ctb_tmp) 581 { 582 slice_header_t *ps_slice_hdr; 583 tile_t *ps_tile = ps_proc->ps_tile; 584 585 /* Waiting for Parsing to be done*/ 586 { 587 588 589 nop_cnt = PROC_NOP_CNT; 590 if(ps_proc->i4_check_parse_status || ps_proc->i4_check_proc_status) 591 { 592 while(1) 593 { 594 volatile UWORD8 *pu1_buf; 595 volatile WORD32 status; 596 status = 1; 597 /* Check if all dependencies for the next nCTBs are met */ 598 /* Check if the next nCTBs are parsed */ 599 if(ps_proc->i4_check_parse_status) 600 { 601 idx = (ps_proc->i4_ctb_x + nctb - 1); 602 idx += (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb); 603 pu1_buf = (ps_codec->pu1_parse_map + idx); 604 status = *pu1_buf; 605 } 606 607 if(status) 608 break; 609 610 /* if dependencies are not met, then wait for few cycles. 611 * Even after few iterations, if the dependencies are not met then yield 612 */ 613 if(nop_cnt > 0) 614 { 615 NOP(128); 616 nop_cnt -= 128; 617 } 618 else 619 { 620 nop_cnt = PROC_NOP_CNT; 621 ithread_yield(); 622 } 623 } 624 } 625 } 626 627 /* Check proc map to ensure dependencies for recon are met */ 628 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 629 630 ihevcd_slice_hdr_update(ps_proc); 631 ps_slice_hdr = ps_proc->ps_slice_hdr; 632 633 //ihevcd_mv_prediction(); 634 //ihevcd_lvl_unpack(); 635 //ihevcd_inter_iq_it_recon(); 636 //Following does prediction, iq, it and recon on a TU by TU basis for intra TUs 637 //ihevcd_intra_process(); 638 //ihevcd_ctb_boundary_strength_islice(ps_proc, ctb_size); 639 //ihevcd_deblk_ctb(ps_proc); 640 641 /* iq,it recon of Intra TU */ 642 { 643 UWORD32 *pu4_ctb_top_pu_idx, *pu4_ctb_left_pu_idx, *pu4_ctb_top_left_pu_idx; 644 WORD32 cur_ctb_idx; 645 646 ihevcd_ctb_avail_update(ps_proc); 647 648 #if DEBUG_DUMP_FRAME_BUFFERS_INFO 649 au1_pic_avail_ctb_flags[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] = 650 ((ps_proc->u1_top_ctb_avail << 3) | (ps_proc->u1_left_ctb_avail << 2) | (ps_proc->u1_top_lt_ctb_avail << 1) | (ps_proc->u1_top_rt_ctb_avail)); 651 au4_pic_ctb_slice_xy[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] = 652 (((UWORD16)ps_proc->i4_ctb_slice_x << 16) | ((UWORD16)ps_proc->i4_ctb_slice_y << 16)); 653 #endif 654 655 /*************************************************/ 656 /**************** MV pred **********************/ 657 /*************************************************/ 658 if(PSLICE == ps_slice_hdr->i1_slice_type 659 || BSLICE == ps_slice_hdr->i1_slice_type) 660 { 661 mv_ctxt_t s_mv_ctxt; 662 663 pu4_ctb_top_pu_idx = ps_proc->pu4_pic_pu_idx_top 664 + (ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE); 665 pu4_ctb_left_pu_idx = ps_proc->pu4_pic_pu_idx_left; 666 pu4_ctb_top_left_pu_idx = &ps_proc->u4_ctb_top_left_pu_idx; 667 668 /* Initializing s_mv_ctxt */ 669 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 670 { 671 s_mv_ctxt.ps_pps = ps_proc->ps_pps; 672 s_mv_ctxt.ps_sps = ps_proc->ps_sps; 673 s_mv_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 674 s_mv_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 675 s_mv_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 676 s_mv_ctxt.ps_pu = ps_proc->ps_pu; 677 s_mv_ctxt.ps_pic_pu = ps_proc->ps_pic_pu; 678 s_mv_ctxt.ps_tile = ps_tile; 679 s_mv_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map; 680 s_mv_ctxt.pu4_pic_pu_idx = ps_proc->pu4_pic_pu_idx; 681 s_mv_ctxt.pu1_pic_pu_map = ps_proc->pu1_pic_pu_map; 682 s_mv_ctxt.i4_ctb_pu_cnt = ps_proc->i4_ctb_pu_cnt; 683 s_mv_ctxt.i4_ctb_start_pu_idx = ps_proc->i4_ctb_start_pu_idx; 684 s_mv_ctxt.u1_top_ctb_avail = ps_proc->u1_top_ctb_avail; 685 s_mv_ctxt.u1_top_rt_ctb_avail = ps_proc->u1_top_rt_ctb_avail; 686 s_mv_ctxt.u1_top_lt_ctb_avail = ps_proc->u1_top_lt_ctb_avail; 687 s_mv_ctxt.u1_left_ctb_avail = ps_proc->u1_left_ctb_avail; 688 689 ihevcd_get_mv_ctb(&s_mv_ctxt, pu4_ctb_top_pu_idx, 690 pu4_ctb_left_pu_idx, pu4_ctb_top_left_pu_idx); 691 } 692 693 ihevcd_inter_pred_ctb(ps_proc); 694 } 695 else if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 696 { 697 WORD32 next_ctb_idx, num_pu_per_ctb, ctb_start_pu_idx, pu_cnt; 698 pu_t *ps_pu; 699 WORD32 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 700 UWORD8 *pu1_pic_pu_map_ctb = ps_proc->pu1_pic_pu_map + 701 (ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb; 702 WORD32 row, col; 703 UWORD32 *pu4_nbr_pu_idx = ps_proc->pu4_pic_pu_idx_map; 704 WORD32 nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2; 705 706 for(row = 0; row < ctb_size / MIN_PU_SIZE; row++) 707 { 708 for(col = 0; col < ctb_size / MIN_PU_SIZE; col++) 709 { 710 pu1_pic_pu_map_ctb[row * ctb_size / MIN_PU_SIZE + col] = 0; 711 } 712 } 713 /* Neighbor PU idx update inside CTB */ 714 /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */ 715 716 cur_ctb_idx = ps_proc->i4_ctb_x 717 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 718 next_ctb_idx = ps_proc->i4_next_pu_ctb_cnt; 719 num_pu_per_ctb = ps_proc->pu4_pic_pu_idx[next_ctb_idx] 720 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 721 ctb_start_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 722 ps_pu = &ps_proc->ps_pic_pu[ctb_start_pu_idx]; 723 724 for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++) 725 { 726 UWORD32 cur_pu_idx; 727 WORD32 pu_ht = (ps_pu->b4_ht + 1) << 2; 728 WORD32 pu_wd = (ps_pu->b4_wd + 1) << 2; 729 730 cur_pu_idx = ctb_start_pu_idx + pu_cnt; 731 732 for(row = 0; row < pu_ht / MIN_PU_SIZE; row++) 733 for(col = 0; col < pu_wd / MIN_PU_SIZE; col++) 734 pu4_nbr_pu_idx[(1 + ps_pu->b4_pos_x + col) 735 + (1 + ps_pu->b4_pos_y + row) 736 * nbr_pu_idx_strd] = 737 cur_pu_idx; 738 } 739 740 /* Updating Top and Left pointers */ 741 { 742 WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples 743 - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size); 744 WORD32 ctb_size_left = MIN(ctb_size, rows_remaining); 745 746 /* Top Left */ 747 /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */ 748 ps_proc->u4_ctb_top_left_pu_idx = ps_proc->pu4_pic_pu_idx_top[((ps_proc->i4_ctb_x + 1) * ctb_size / MIN_PU_SIZE) - 1]; 749 for(i = 0; i < ctb_size / MIN_PU_SIZE; i++) 750 { 751 /* Left */ 752 /* Last column of au4_nbr_pu_idx */ 753 ps_proc->pu4_pic_pu_idx_left[i] = 754 pu4_nbr_pu_idx[(ctb_size / MIN_PU_SIZE) + (i + 1) * nbr_pu_idx_strd]; 755 /* Top */ 756 /* Last row of au4_nbr_pu_idx */ 757 ps_proc->pu4_pic_pu_idx_top[(ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE) + i] = 758 pu4_nbr_pu_idx[(ctb_size_left / MIN_PU_SIZE) * nbr_pu_idx_strd + i + 1]; 759 760 } 761 } 762 } 763 } 764 765 if(ps_proc->ps_pps->i1_tiles_enabled_flag) 766 { 767 /*Update the tile index buffer with tile information for the current ctb*/ 768 UWORD16 *pu1_tile_idx = ps_proc->pu1_tile_idx; 769 pu1_tile_idx[(ps_proc->i4_ctb_x + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb))] 770 = ps_proc->i4_cur_tile_idx; 771 } 772 773 /*************************************************/ 774 /*********** BS, QP and Deblocking **************/ 775 /*************************************************/ 776 /* Boundary strength call has to be after IQ IT recon since QP population needs ps_proc->i4_qp_const_inc_ctb flag */ 777 778 { 779 slice_header_t *ps_slice_hdr; 780 ps_slice_hdr = ps_proc->ps_slice_hdr; 781 782 783 /* Check if deblock is disabled for the current slice or if it is disabled for the current picture 784 * because of disable deblock api 785 */ 786 if(0 == ps_codec->i4_disable_deblk_pic) 787 { 788 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 789 { 790 /* Boundary strength calculation is done irrespective of whether deblocking is disabled 791 * in the slice or not, to handle deblocking slice boundaries */ 792 if((0 == ps_codec->i4_slice_error)) 793 { 794 ihevcd_update_ctb_tu_cnt(ps_proc); 795 ps_proc->s_bs_ctxt.ps_pps = ps_proc->ps_pps; 796 ps_proc->s_bs_ctxt.ps_sps = ps_proc->ps_sps; 797 ps_proc->s_bs_ctxt.ps_codec = ps_proc->ps_codec; 798 ps_proc->s_bs_ctxt.i4_ctb_tu_cnt = ps_proc->i4_ctb_tu_cnt; 799 ps_proc->s_bs_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 800 ps_proc->s_bs_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 801 ps_proc->s_bs_ctxt.i4_ctb_tile_x = ps_proc->i4_ctb_tile_x; 802 ps_proc->s_bs_ctxt.i4_ctb_tile_y = ps_proc->i4_ctb_tile_y; 803 ps_proc->s_bs_ctxt.i4_ctb_slice_x = ps_proc->i4_ctb_slice_x; 804 ps_proc->s_bs_ctxt.i4_ctb_slice_y = ps_proc->i4_ctb_slice_y; 805 ps_proc->s_bs_ctxt.ps_tu = ps_proc->ps_tu; 806 ps_proc->s_bs_ctxt.ps_pu = ps_proc->ps_pu; 807 ps_proc->s_bs_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map; 808 ps_proc->s_bs_ctxt.i4_next_pu_ctb_cnt = ps_proc->i4_next_pu_ctb_cnt; 809 ps_proc->s_bs_ctxt.i4_next_tu_ctb_cnt = ps_proc->i4_next_tu_ctb_cnt; 810 ps_proc->s_bs_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 811 ps_proc->s_bs_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 812 ps_proc->s_bs_ctxt.ps_tile = ps_proc->ps_tile; 813 814 if(ISLICE == ps_slice_hdr->i1_slice_type) 815 { 816 ihevcd_ctb_boundary_strength_islice(&ps_proc->s_bs_ctxt); 817 } 818 else 819 { 820 ihevcd_ctb_boundary_strength_pbslice(&ps_proc->s_bs_ctxt); 821 } 822 } 823 824 /* Boundary strength is set to zero if deblocking is disabled for the current slice */ 825 if((0 != ps_slice_hdr->i1_slice_disable_deblocking_filter_flag)) 826 { 827 WORD32 bs_strd = (ps_sps->i2_pic_wd_in_ctb + 1) * (ctb_size * ctb_size / 8 / 16); 828 829 UWORD32 *pu4_vert_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_vert_bs + 830 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) + 831 ps_proc->i4_ctb_y * bs_strd); 832 UWORD32 *pu4_horz_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_horz_bs + 833 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) + 834 ps_proc->i4_ctb_y * bs_strd); 835 836 memset(pu4_vert_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2); 837 memset(pu4_horz_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2); 838 } 839 } 840 } 841 } 842 843 /* Per CTB update the following */ 844 { 845 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x 846 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 847 cur_ctb_idx++; 848 849 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb; 850 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt; 851 if((1 == ps_codec->i4_num_cores) && 852 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB)) 853 { 854 ps_proc->ps_tu = ps_proc->ps_pic_tu; 855 } 856 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt; 857 } 858 859 /* Update proc map for recon*/ 860 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 861 862 num_ctb_tmp -= nctb; 863 ihevcd_ctb_pos_update(ps_proc, nctb); 864 865 } 866 867 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 868 { 869 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 870 ps_proc->i4_cur_slice_idx = cur_slice_idx; 871 } 872 /* Restore the saved variables */ 873 num_ctb_tmp = num_ctb; 874 ps_proc->i4_ctb_x -= num_ctb; 875 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 876 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 877 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 878 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 879 ps_proc->pu1_pu_map = pu1_pu_map_cur; 880 ps_proc->ps_tu = ps_tu_cur; 881 proc_type = PROC_RECON; 882 883 while(num_ctb_tmp) 884 { 885 886 /* Check proc map to ensure dependencies for recon are met */ 887 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 888 889 ihevcd_slice_hdr_update(ps_proc); 890 891 { 892 893 ihevcd_ctb_avail_update(ps_proc); 894 895 /*************************************************/ 896 /**************** IQ IT RECON *******************/ 897 /*************************************************/ 898 899 ihevcd_update_ctb_tu_cnt(ps_proc); 900 901 /* When scaling matrix is not to be used(scaling_list_enable_flag is zero in SPS), 902 * default value of 16 has to be used. Since the value is same for all sizes, 903 * same table is used for all cases. 904 */ 905 if(0 == ps_sps->i1_scaling_list_enable_flag) 906 { 907 ps_proc->api2_dequant_intra_matrix[0] = 908 (WORD16 *)gi2_flat_scale_mat_32x32; 909 ps_proc->api2_dequant_intra_matrix[1] = 910 (WORD16 *)gi2_flat_scale_mat_32x32; 911 ps_proc->api2_dequant_intra_matrix[2] = 912 (WORD16 *)gi2_flat_scale_mat_32x32; 913 ps_proc->api2_dequant_intra_matrix[3] = 914 (WORD16 *)gi2_flat_scale_mat_32x32; 915 916 ps_proc->api2_dequant_inter_matrix[0] = 917 (WORD16 *)gi2_flat_scale_mat_32x32; 918 ps_proc->api2_dequant_inter_matrix[1] = 919 (WORD16 *)gi2_flat_scale_mat_32x32; 920 ps_proc->api2_dequant_inter_matrix[2] = 921 (WORD16 *)gi2_flat_scale_mat_32x32; 922 ps_proc->api2_dequant_inter_matrix[3] = 923 (WORD16 *)gi2_flat_scale_mat_32x32; 924 } 925 else 926 { 927 if(0 == ps_sps->i1_sps_scaling_list_data_present_flag) 928 { 929 ps_proc->api2_dequant_intra_matrix[0] = 930 (WORD16 *)gi2_flat_scale_mat_32x32; 931 ps_proc->api2_dequant_intra_matrix[1] = 932 (WORD16 *)gi2_intra_default_scale_mat_8x8; 933 ps_proc->api2_dequant_intra_matrix[2] = 934 (WORD16 *)gi2_intra_default_scale_mat_16x16; 935 ps_proc->api2_dequant_intra_matrix[3] = 936 (WORD16 *)gi2_intra_default_scale_mat_32x32; 937 938 ps_proc->api2_dequant_inter_matrix[0] = 939 (WORD16 *)gi2_flat_scale_mat_32x32; 940 ps_proc->api2_dequant_inter_matrix[1] = 941 (WORD16 *)gi2_inter_default_scale_mat_8x8; 942 ps_proc->api2_dequant_inter_matrix[2] = 943 (WORD16 *)gi2_inter_default_scale_mat_16x16; 944 ps_proc->api2_dequant_inter_matrix[3] = 945 (WORD16 *)gi2_inter_default_scale_mat_32x32; 946 } 947 /*TODO: Add support for custom scaling matrices */ 948 } 949 950 951 /* CTB Level pointers */ 952 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 953 + (ps_proc->i4_ctb_x * ctb_size 954 + ps_proc->i4_ctb_y * ctb_size 955 * ps_codec->i4_strd); 956 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 957 + ps_proc->i4_ctb_x * ctb_size 958 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 959 960 ihevcd_iquant_itrans_recon_ctb(ps_proc); 961 } 962 963 /* Per CTB update the following */ 964 { 965 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x 966 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 967 cur_ctb_idx++; 968 969 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb; 970 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt; 971 if((1 == ps_codec->i4_num_cores) && 972 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB)) 973 { 974 ps_proc->ps_tu = ps_proc->ps_pic_tu; 975 } 976 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt; 977 } 978 979 980 /* Update proc map for recon*/ 981 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 982 983 num_ctb_tmp -= nctb; 984 ihevcd_ctb_pos_update(ps_proc, nctb); 985 } 986 987 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 988 { 989 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 990 ps_proc->i4_cur_slice_idx = cur_slice_idx; 991 } 992 /* Restore the saved variables */ 993 num_ctb_tmp = num_ctb; 994 ps_proc->i4_ctb_x -= num_ctb; 995 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 996 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 997 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 998 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 999 pu1_pu_map_nxt = ps_proc->pu1_pu_map; 1000 ps_tu_nxt = ps_proc->ps_tu; 1001 ps_proc->pu1_pu_map = pu1_pu_map_cur; 1002 ps_proc->ps_tu = ps_tu_cur; 1003 proc_type = PROC_DEBLK; 1004 1005 while(num_ctb_tmp) 1006 { 1007 1008 1009 /* Check proc map to ensure dependencies for deblk are met */ 1010 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 1011 1012 ihevcd_slice_hdr_update(ps_proc); 1013 1014 1015 if(((0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)) && 1016 (0 == ps_codec->i4_disable_deblk_pic)) 1017 { 1018 WORD32 i4_is_last_ctb_x = 0; 1019 WORD32 i4_is_last_ctb_y = 0; 1020 1021 1022 /* Deblocking is done irrespective of whether it is disabled in the slice or not, 1023 * to handle deblocking the slice boundaries */ 1024 { 1025 ps_proc->s_deblk_ctxt.ps_pps = ps_proc->ps_pps; 1026 ps_proc->s_deblk_ctxt.ps_sps = ps_proc->ps_sps; 1027 ps_proc->s_deblk_ctxt.ps_codec = ps_proc->ps_codec; 1028 ps_proc->s_deblk_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 1029 ps_proc->s_deblk_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1030 ps_proc->s_deblk_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1031 ps_proc->s_deblk_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 1032 ps_proc->s_deblk_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU); 1033 1034 /* Populating Current CTB's no_loop_filter flags */ 1035 { 1036 WORD32 row; 1037 WORD32 log2_ctb_size = ps_sps->i1_log2_ctb_size; 1038 1039 /* Loop filter strd in units of num bits */ 1040 WORD32 loop_filter_strd = ((ps_sps->i2_pic_width_in_luma_samples + 63) >> 6) << 3; 1041 /* Bit position is the current 8x8 bit offset wrt pic_no_loop_filter 1042 * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */ 1043 WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1; 1044 1045 for(row = 0; row < (ctb_size >> 3) + 1; row++) 1046 { 1047 /* Go to the corresponding byte - read 32 bits and downshift */ 1048 ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7); 1049 bit_pos += loop_filter_strd; 1050 } 1051 } 1052 1053 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1054 1055 /* If the last CTB in the row was a complete CTB then deblocking has to be called from remaining pixels, since deblocking 1056 * is applied on a shifted CTB structure 1057 */ 1058 if(ps_proc->i4_ctb_x == ps_sps->i2_pic_wd_in_ctb - 1) 1059 { 1060 WORD32 i4_is_last_ctb_x = 1; 1061 WORD32 i4_is_last_ctb_y = 0; 1062 1063 WORD32 last_x_pos; 1064 last_x_pos = (ps_sps->i2_pic_wd_in_ctb << ps_sps->i1_log2_ctb_size); 1065 if(last_x_pos == ps_sps->i2_pic_width_in_luma_samples) 1066 { 1067 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1068 } 1069 } 1070 1071 1072 /* If the last CTB in the column was a complete CTB then deblocking has to be called from remaining pixels, since deblocking 1073 * is applied on a shifted CTB structure 1074 */ 1075 if(ps_proc->i4_ctb_y == ps_sps->i2_pic_ht_in_ctb - 1) 1076 { 1077 WORD32 i4_is_last_ctb_x = 0; 1078 WORD32 i4_is_last_ctb_y = 1; 1079 WORD32 last_y_pos; 1080 last_y_pos = (ps_sps->i2_pic_ht_in_ctb << ps_sps->i1_log2_ctb_size); 1081 if(last_y_pos == ps_sps->i2_pic_height_in_luma_samples) 1082 { 1083 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1084 } 1085 } 1086 } 1087 } 1088 1089 /* Update proc map for deblk*/ 1090 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1091 1092 num_ctb_tmp -= nctb; 1093 ihevcd_ctb_pos_update(ps_proc, nctb); 1094 } 1095 1096 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 1097 { 1098 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 1099 ps_proc->i4_cur_slice_idx = cur_slice_idx; 1100 } 1101 /* Restore the saved variables */ 1102 num_ctb_tmp = num_ctb; 1103 ps_proc->i4_ctb_x -= num_ctb; 1104 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 1105 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 1106 ps_proc->pu1_pu_map = pu1_pu_map_cur; 1107 ps_proc->ps_tu = ps_tu_cur; 1108 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y; 1109 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x; 1110 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 1111 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 1112 proc_type = PROC_SAO; 1113 1114 while(num_ctb_tmp) 1115 { 1116 1117 1118 /* Check proc map to ensure dependencies for SAO are met */ 1119 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 1120 1121 ihevcd_slice_hdr_update(ps_proc); 1122 1123 1124 if(0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1) 1125 { 1126 /* SAO is done even when it is disabled in the current slice, because 1127 * it is performed on a shifted CTB and the neighbor CTBs can belong 1128 * to different slices with SAO enabled */ 1129 if(0 == ps_codec->i4_disable_sao_pic) 1130 { 1131 ps_proc->s_sao_ctxt.ps_pps = ps_proc->ps_pps; 1132 ps_proc->s_sao_ctxt.ps_sps = ps_proc->ps_sps; 1133 ps_proc->s_sao_ctxt.ps_tile = ps_proc->ps_tile; 1134 ps_proc->s_sao_ctxt.ps_codec = ps_proc->ps_codec; 1135 ps_proc->s_sao_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 1136 ps_proc->s_sao_ctxt.i4_cur_slice_idx = ps_proc->i4_cur_slice_idx; 1137 1138 1139 #if SAO_PROCESS_SHIFT_CTB 1140 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1141 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1142 ps_proc->s_sao_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU); 1143 1144 ihevcd_sao_shift_ctb(&ps_proc->s_sao_ctxt); 1145 #else 1146 if(ps_proc->i4_ctb_x > 1 && ps_proc->i4_ctb_y > 0) 1147 { 1148 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 2; 1149 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1150 1151 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1152 } 1153 1154 if(ps_sps->i2_pic_wd_in_ctb - 1 == ps_proc->i4_ctb_x && ps_proc->i4_ctb_y > 0) 1155 { 1156 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 1; 1157 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1158 1159 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1160 1161 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1162 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1163 1164 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1165 1166 if(ps_sps->i2_pic_ht_in_ctb - 1 == ps_proc->i4_ctb_y) 1167 { 1168 WORD32 i4_ctb_x; 1169 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1170 for(i4_ctb_x = 0; i4_ctb_x < ps_sps->i2_pic_wd_in_ctb; i4_ctb_x++) 1171 { 1172 ps_proc->s_sao_ctxt.i4_ctb_x = i4_ctb_x; 1173 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1174 } 1175 } 1176 } 1177 #endif 1178 } 1179 1180 1181 /* Call padding if required */ 1182 { 1183 #if SAO_PROCESS_SHIFT_CTB 1184 1185 if(0 == ps_proc->i4_ctb_x) 1186 { 1187 WORD32 pad_ht_luma; 1188 WORD32 pad_ht_chroma; 1189 1190 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 1191 + (ps_proc->i4_ctb_x * ctb_size 1192 + ps_proc->i4_ctb_y * ctb_size 1193 * ps_codec->i4_strd); 1194 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 1195 + ps_proc->i4_ctb_x * ctb_size 1196 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 1197 1198 pad_ht_luma = ctb_size; 1199 pad_ht_luma += (ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y ? 8 : 0; 1200 pad_ht_chroma = ctb_size / 2; 1201 /* Pad left after 1st CTB is processed */ 1202 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1203 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1204 } 1205 1206 if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x) 1207 { 1208 WORD32 pad_ht_luma; 1209 WORD32 pad_ht_chroma; 1210 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size); 1211 1212 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 1213 + (ps_proc->i4_ctb_x * ctb_size 1214 + ps_proc->i4_ctb_y * ctb_size 1215 * ps_codec->i4_strd); 1216 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 1217 + ps_proc->i4_ctb_x * ctb_size 1218 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 1219 1220 pad_ht_luma = ctb_size; 1221 pad_ht_chroma = ctb_size / 2; 1222 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1223 { 1224 pad_ht_luma += 8; 1225 pad_ht_chroma += 16; 1226 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + (ps_sps->i2_pic_height_in_luma_samples / 2 - 16) * ps_codec->i4_strd, 1227 ps_codec->i4_strd, 16, PAD_LEFT); 1228 } 1229 /* Pad right after last CTB in the current row is processed */ 1230 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT); 1231 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT); 1232 1233 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1234 { 1235 UWORD8 *pu1_buf; 1236 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */ 1237 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */ 1238 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1239 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP); 1240 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2); 1241 1242 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT; 1243 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1244 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT); 1245 1246 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT; 1247 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2); 1248 } 1249 } 1250 #else 1251 if(ps_proc->i4_ctb_y > 1) 1252 { 1253 if(0 == ps_proc->i4_ctb_x) 1254 { 1255 WORD32 pad_ht_luma; 1256 WORD32 pad_ht_chroma; 1257 1258 pad_ht_luma = ctb_size; 1259 pad_ht_chroma = ctb_size / 2; 1260 /* Pad left after 1st CTB is processed */ 1261 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1262 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1263 } 1264 else if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x) 1265 { 1266 WORD32 pad_ht_luma; 1267 WORD32 pad_ht_chroma; 1268 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size); 1269 1270 pad_ht_luma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size : ctb_size; 1271 pad_ht_chroma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size / 2 : ctb_size / 2; 1272 /* Pad right after last CTB in the current row is processed */ 1273 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT); 1274 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT); 1275 1276 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1277 { 1278 UWORD8 *pu1_buf; 1279 WORD32 pad_ht_luma; 1280 WORD32 pad_ht_chroma; 1281 1282 pad_ht_luma = 2 * ctb_size; 1283 pad_ht_chroma = ctb_size; 1284 1285 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples - 2 * ctb_size), 1286 ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1287 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2 - ctb_size), 1288 ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1289 1290 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */ 1291 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */ 1292 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1293 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP); 1294 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2); 1295 1296 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT; 1297 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1298 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT); 1299 1300 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT; 1301 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2); 1302 } 1303 } 1304 } 1305 #endif 1306 } 1307 } 1308 1309 1310 /* Update proc map for SAO*/ 1311 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1312 /* Update proc map for Completion of CTB*/ 1313 ihevcd_proc_map_update(ps_proc, PROC_ALL, nctb); 1314 { 1315 tile_t *ps_tile; 1316 1317 ps_tile = ps_proc->ps_tile; 1318 num_ctb_tmp -= nctb; 1319 1320 ps_proc->i4_ctb_tile_x += nctb; 1321 ps_proc->i4_ctb_x += nctb; 1322 1323 ps_proc->i4_ctb_slice_x += nctb; 1324 1325 1326 /* Update tile counters */ 1327 if(ps_proc->i4_ctb_tile_x >= (ps_tile->u2_wd)) 1328 { 1329 /*End of tile row*/ 1330 ps_proc->i4_ctb_tile_x = 0; 1331 ps_proc->i4_ctb_x = ps_tile->u1_pos_x; 1332 1333 ps_proc->i4_ctb_tile_y++; 1334 ps_proc->i4_ctb_y++; 1335 if(ps_proc->i4_ctb_tile_y == ps_tile->u2_ht) 1336 { 1337 /* Reached End of Tile */ 1338 ps_proc->i4_ctb_tile_y = 0; 1339 ps_proc->i4_ctb_tile_x = 0; 1340 ps_proc->ps_tile++; 1341 //End of picture 1342 if(!((ps_tile->u2_ht + ps_tile->u1_pos_y == ps_sps->i2_pic_ht_in_ctb) && (ps_tile->u2_wd + ps_tile->u1_pos_x == ps_sps->i2_pic_wd_in_ctb))) 1343 { 1344 ps_tile = ps_proc->ps_tile; 1345 ps_proc->i4_ctb_x = ps_tile->u1_pos_x; 1346 ps_proc->i4_ctb_y = ps_tile->u1_pos_y; 1347 1348 } 1349 } 1350 } 1351 } 1352 } 1353 1354 ps_proc->i4_ctb_cnt -= num_ctb; 1355 } 1356 return ret; 1357 } 1358 1359 void ihevcd_init_proc_ctxt(process_ctxt_t *ps_proc, WORD32 tu_coeff_data_ofst) 1360 { 1361 codec_t *ps_codec; 1362 slice_header_t *ps_slice_hdr; 1363 pps_t *ps_pps; 1364 sps_t *ps_sps; 1365 tile_t *ps_tile, *ps_tile_prev; 1366 WORD32 tile_idx; 1367 WORD32 ctb_size; 1368 WORD32 num_minpu_in_ctb; 1369 WORD32 num_ctb_in_row; 1370 WORD32 ctb_addr; 1371 WORD32 i4_wd_in_ctb; 1372 WORD32 tile_start_ctb_idx; 1373 WORD32 slice_start_ctb_idx; 1374 WORD32 check_tile_wd; 1375 WORD32 continuous_tiles = 0; //Refers to tiles that are continuous, within a slice, horizontally 1376 1377 ps_codec = ps_proc->ps_codec; 1378 1379 ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx) & (MAX_SLICE_HDR_CNT - 1)); 1380 ps_proc->ps_slice_hdr = ps_slice_hdr; 1381 ps_proc->ps_pps = ps_codec->ps_pps_base + ps_slice_hdr->i1_pps_id; 1382 ps_pps = ps_proc->ps_pps; 1383 ps_proc->ps_sps = ps_codec->ps_sps_base + ps_pps->i1_sps_id; 1384 ps_sps = ps_proc->ps_sps; 1385 ps_proc->i4_init_done = 1; 1386 ctb_size = 1 << ps_sps->i1_log2_ctb_size; 1387 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 1388 num_ctb_in_row = ps_sps->i2_pic_wd_in_ctb; 1389 1390 ps_proc->s_sao_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 1391 1392 ihevcd_get_tile_pos(ps_pps, ps_sps, ps_proc->i4_ctb_x, ps_proc->i4_ctb_y, 1393 &ps_proc->i4_ctb_tile_x, &ps_proc->i4_ctb_tile_y, 1394 &tile_idx); 1395 1396 ps_proc->ps_tile = ps_pps->ps_tile + tile_idx; 1397 ps_proc->i4_cur_tile_idx = tile_idx; 1398 ps_tile = ps_proc->ps_tile; 1399 1400 if(ps_pps->i1_tiles_enabled_flag) 1401 { 1402 if(tile_idx) 1403 ps_tile_prev = ps_tile - 1; 1404 else 1405 ps_tile_prev = ps_tile; 1406 1407 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 1408 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 1409 1410 /*Check if 1411 * 1. Last tile that ends in frame boundary and 1st tile in next row belongs to same slice 1412 * 1.1. If it does, check if the slice that has these tiles spans across the frame row. 1413 * 2. Vertical tiles are present within a slice */ 1414 if(((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x) && (ps_slice_hdr->i2_ctb_y != ps_tile->u1_pos_y))) 1415 { 1416 continuous_tiles = 1; 1417 } 1418 else 1419 { 1420 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd; 1421 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x)) 1422 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x)))) 1423 { 1424 continuous_tiles = 1; 1425 } 1426 } 1427 1428 { 1429 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x; 1430 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y; 1431 1432 /* Handles cases where 1433 * 1. Slices begin at the start of each tile 1434 * 2. Tiles lie in the same slice row.i.e, starting tile_x > slice_x, but tile_y == slice_y 1435 * */ 1436 if(ps_proc->i4_ctb_x >= i2_independent_ctb_x) 1437 { 1438 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x; 1439 } 1440 else 1441 { 1442 /* Indicates multiple tiles in a slice case where 1443 * The new tile belongs to an older slice that started in the previous rows-not the present row 1444 * & (tile_y > slice_y and tile_x < slice_x) 1445 */ 1446 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles)) 1447 { 1448 i4_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb; 1449 } 1450 /* Indicates many-tiles-in-one-slice case, for slices that end without spanning the frame width*/ 1451 else 1452 { 1453 i4_wd_in_ctb = ps_tile->u2_wd; 1454 } 1455 1456 if(continuous_tiles) 1457 { 1458 ps_proc->i4_ctb_slice_x = i4_wd_in_ctb 1459 - (i2_independent_ctb_x - ps_proc->i4_ctb_x); 1460 } 1461 else 1462 { 1463 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - ps_tile->u1_pos_x; 1464 } 1465 } 1466 /* Initialize ctb slice y to zero and at the start of slice row initialize it 1467 to difference between ctb_y and slice's start ctb y */ 1468 1469 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y; 1470 1471 /*If beginning of tile, check if slice counters are set correctly*/ 1472 if((0 == ps_proc->i4_ctb_tile_x) && (0 == ps_proc->i4_ctb_tile_y)) 1473 { 1474 if(ps_slice_hdr->i1_dependent_slice_flag) 1475 { 1476 ps_proc->i4_ctb_slice_x = 0; 1477 ps_proc->i4_ctb_slice_y = 0; 1478 } 1479 /*For slices that span across multiple tiles*/ 1480 else if(slice_start_ctb_idx < tile_start_ctb_idx) 1481 { 1482 ps_proc->i4_ctb_slice_y = ps_tile->u1_pos_y - i2_independent_ctb_y; 1483 /* Two Cases 1484 * 1 - slice spans across frame-width- but dose not start from 1st column 1485 * 2 - Slice spans across multiple tiles anywhere is a frame 1486 */ 1487 /*TODO:In a multiple slice clip, if an independent slice span across more than 2 tiles in a row, it is not supported*/ 1488 if(continuous_tiles) //Case 2-implemented for slices that span not more than 2 tiles 1489 { 1490 if(i2_independent_ctb_y <= ps_tile->u1_pos_y) 1491 { 1492 //Check if ctb x is before or after 1493 if(i2_independent_ctb_x > ps_tile->u1_pos_x) 1494 { 1495 ps_proc->i4_ctb_slice_y -= 1; 1496 } 1497 } 1498 } 1499 } 1500 } 1501 //Slice starts from a column which is not the starting tile-column, but is within the tile 1502 if(((i2_independent_ctb_x - ps_tile->u1_pos_x) != 0) && ((ps_proc->i4_ctb_slice_y != 0)) 1503 && ((i2_independent_ctb_x >= ps_tile->u1_pos_x) && (i2_independent_ctb_x < ps_tile->u1_pos_x + ps_tile->u2_wd))) 1504 { 1505 ps_proc->i4_ctb_slice_y -= 1; 1506 } 1507 } 1508 } 1509 else 1510 { 1511 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x; 1512 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y; 1513 1514 1515 { 1516 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x; 1517 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y; 1518 if(ps_proc->i4_ctb_slice_x < 0) 1519 { 1520 ps_proc->i4_ctb_slice_x += ps_sps->i2_pic_wd_in_ctb; 1521 ps_proc->i4_ctb_slice_y -= 1; 1522 } 1523 1524 /* Initialize ctb slice y to zero and at the start of slice row initialize it 1525 to difference between ctb_y and slice's start ctb y */ 1526 } 1527 } 1528 1529 /* Compute TU offset for the current CTB set */ 1530 { 1531 1532 WORD32 ctb_luma_min_tu_cnt; 1533 WORD32 ctb_addr; 1534 1535 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x; 1536 1537 ctb_luma_min_tu_cnt = (1 << ps_sps->i1_log2_ctb_size) / MIN_TU_SIZE; 1538 ctb_luma_min_tu_cnt *= ctb_luma_min_tu_cnt; 1539 1540 ps_proc->pu1_tu_map = ps_proc->pu1_pic_tu_map 1541 + ctb_luma_min_tu_cnt * ctb_addr; 1542 if(1 == ps_codec->i4_num_cores) 1543 { 1544 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr % RESET_TU_BUF_NCTB]; 1545 } 1546 else 1547 { 1548 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr]; 1549 } 1550 ps_proc->pv_tu_coeff_data = (UWORD8 *)ps_proc->pv_pic_tu_coeff_data 1551 + tu_coeff_data_ofst; 1552 1553 } 1554 1555 /* Compute PU related elements for the current CTB set */ 1556 { 1557 WORD32 pu_idx; 1558 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x; 1559 pu_idx = ps_proc->pu4_pic_pu_idx[ctb_addr]; 1560 ps_proc->pu1_pu_map = ps_proc->pu1_pic_pu_map 1561 + ctb_addr * num_minpu_in_ctb; 1562 ps_proc->ps_pu = ps_proc->ps_pic_pu + pu_idx; 1563 } 1564 1565 /* Number of ctbs processed in one loop of process function */ 1566 { 1567 ps_proc->i4_nctb = MIN(ps_codec->u4_nctb, ps_tile->u2_wd); 1568 } 1569 1570 } 1571 void ihevcd_process_thread(process_ctxt_t *ps_proc) 1572 { 1573 { 1574 ithread_set_affinity(ps_proc->i4_id + 1); 1575 } 1576 while(1) 1577 { 1578 IHEVCD_ERROR_T ret; 1579 proc_job_t s_job; 1580 1581 ret = ihevcd_jobq_dequeue((jobq_t *)ps_proc->pv_proc_jobq, &s_job, 1582 sizeof(proc_job_t), 1); 1583 if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret) 1584 break; 1585 1586 ps_proc->i4_ctb_cnt = s_job.i2_ctb_cnt; 1587 ps_proc->i4_ctb_x = s_job.i2_ctb_x; 1588 ps_proc->i4_ctb_y = s_job.i2_ctb_y; 1589 ps_proc->i4_cur_slice_idx = s_job.i2_slice_idx; 1590 1591 1592 1593 if(CMD_PROCESS == s_job.i4_cmd) 1594 { 1595 ihevcd_init_proc_ctxt(ps_proc, s_job.i4_tu_coeff_data_ofst); 1596 ihevcd_process(ps_proc); 1597 } 1598 else if(CMD_FMTCONV == s_job.i4_cmd) 1599 { 1600 sps_t *ps_sps; 1601 codec_t *ps_codec; 1602 ivd_out_bufdesc_t *ps_out_buffer; 1603 WORD32 num_rows; 1604 1605 if(0 == ps_proc->i4_init_done) 1606 { 1607 ihevcd_init_proc_ctxt(ps_proc, 0); 1608 } 1609 ps_sps = ps_proc->ps_sps; 1610 ps_codec = ps_proc->ps_codec; 1611 ps_out_buffer = ps_proc->ps_out_buffer; 1612 num_rows = 1 << ps_sps->i1_log2_ctb_size; 1613 1614 num_rows = MIN(num_rows, (ps_codec->i4_disp_ht - (s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size))); 1615 1616 if(num_rows < 0) 1617 num_rows = 0; 1618 1619 ihevcd_fmt_conv(ps_proc->ps_codec, ps_proc, ps_out_buffer->pu1_bufs[0], ps_out_buffer->pu1_bufs[1], ps_out_buffer->pu1_bufs[2], 1620 s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size, num_rows); 1621 } 1622 } 1623 //ithread_exit(0); 1624 return; 1625 } 1626 1627
