/external/llvm/lib/CodeGen/ |
DeadMachineInstructionElim.cpp | 46 bool isDead(const MachineInstr *MI) const; 55 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { 123 if (isDead(MI)) {
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MachineInstrBundle.cpp | 174 if (MO.isDead()) { 180 if (!MO.isDead()) 185 if (!MO.isDead()) { 202 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); 203 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | 330 if (!MO.isDead())
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LivePhysRegs.cpp | 98 if (Reg.second->isReg() && Reg.second->isDead())
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MachineCSE.cpp | 257 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end())) 545 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead()) 550 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
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PHIElimination.cpp | 236 bool isDead = MPhi->getOperand(0).isDead(); 304 if (isDead) { 332 if (DestLI.endIndex().isDead()) {
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MachineInstr.cpp | 177 bool isKill, bool isDead, bool isUndef, 197 IsDead = isDead; 318 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || 344 if (isDead()) { [all...] |
TailDuplication.cpp | 103 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, 232 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); 234 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs); 237 if (isDead) { 464 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, 487 if (isDead) { [all...] |
RegAllocFast.cpp | 649 } else if (MO.isDead()) { 660 } else if (MO.isDead()) { 676 bool Dead = MO.isDead(); [all...] |
VirtRegMap.cpp | 389 if (MO.isDead()) 401 } else if (!MO.isDead()) {
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LiveInterval.cpp | 62 assert(!Def.isDead() && "Cannot define a value at the dead slot"); 534 bool isDead = true; 537 isDead = false; 540 if (isDead) { [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyStoreResults.cpp | 118 assert(!MI.getOperand(0).isDead() && "Dead flag set on store result");
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/external/llvm/include/llvm/CodeGen/ |
MachineOperand.h | 82 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register 97 /// IsDead - True if this register is never used by a subsequent instruction. 99 bool IsDead : 1; 292 bool isDead() const { 294 return IsDead; 383 IsDead = Val; 542 /// operand. Note: This method ignores isKill and isDead properties. 572 bool isKill = false, bool isDead = false, 598 bool isKill = false, bool isDead = false, 604 assert(!(isDead && !isDef) && "Dead flag on non-def") [all...] |
MachineInstr.h | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64DeadRegisterDefinitionsPass.cpp | 93 if (MO.isReg() && MO.isDead() && MO.isDef()) {
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AArch64ExpandPseudoInsts.cpp | 118 const bool DstIsDead = MI.getOperand(0).isDead(); 183 const bool DstIsDead = MI.getOperand(0).isDead(); 366 const bool DstIsDead = MI.getOperand(0).isDead(); 535 bool DstIsDead = MI.getOperand(0).isDead();
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/packages/inputmethods/LatinIME/java/src/com/android/inputmethod/event/ |
DeadKeyCombiner.java | 240 if (event.isDead()) { 268 if (event.isDead()) {
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Event.java | 278 public boolean isDead() {
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/packages/inputmethods/LatinIME/tests/src/com/android/inputmethod/latin/ |
InputLogicTestsDeadKeys.java | 30 public EventList addCodePoint(final int codePoint, final boolean isDead) { 32 if (isDead) {
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/external/clang/lib/StaticAnalyzer/Checkers/ |
ExprInspectionChecker.cpp | 167 if (!SymReaper.isDead(Sym))
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SimpleStreamChecker.cpp | 192 bool IsSymDead = SymReaper.isDead(Sym);
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/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.h | 406 bool isDead = false) { 407 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
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Thumb2SizeReduction.cpp | 721 if (HasCC && MI->getOperand(NumOps-1).isDead()) 816 if (HasCC && MI->getOperand(NumOps-1).isDead()) 884 if (!MO.isDead()) [all...] |
ARMExpandPseudoInsts.cpp | 390 bool DstIsDead = MI.getOperand(OpIdx).isDead(); 524 DstIsDead = MI.getOperand(OpIdx).isDead(); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 234 false /*isDead*/, 323 Src.isKill(), Src.isDead(), Src.isUndef(),
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/external/llvm/lib/Target/AMDGPU/ |
SIShrinkInstructions.cpp | 196 Orig.isDead(),
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