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    Searched refs:isFP64bit (Results 1 - 12 of 12) sorted by null

  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsABIFlagsSection.h 140 CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32;
170 else if (P.isFP64bit())
  /external/llvm/lib/Target/Mips/
MipsSubtarget.cpp 67 NoABICalls(false), IsFP64bit(false), UseOddSPReg(true),
97 if (hasMSA() && !isFP64bit())
111 assert(isFP64bit());
MipsRegisterInfo.cpp 106 if (Subtarget.isFP64bit())
128 if (Subtarget.isFP64bit())
174 if (Subtarget.isFP64bit()) {
MipsSubtarget.h 71 // IsFP64bit - The target processor has 64-bit floating point registers.
72 bool IsFP64bit;
81 // IsFP64bit - General-purpose registers are 64 bits wide
221 bool isFP64bit() const { return IsFP64bit; }
MipsSEInstrInfo.cpp 604 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg()));
655 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg()));
MipsSEFrameLowering.cpp 293 !Subtarget.isFP64bit());
356 !Subtarget.isFP64bit());
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MipsAsmPrinter.cpp 742 if (ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit()))
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MipsSEISelDAGToDAG.cpp 741 } else if (Subtarget->isFP64bit()) {
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MipsSEISelLowering.cpp 107 if (Subtarget.isFP64bit())
183 assert(Subtarget.isFP64bit() && "FR=1 is required for MIPS32r6");
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MipsFastISel.cpp 199 UnsupportedFPMode = Subtarget->isFP64bit();
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MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 450 bool isFP64bit() const {
566 /// isFP64bit())
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