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      1 /*
      2  * Copyright (c) 2007-2013 Intel Corporation. All Rights Reserved.
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the
      6  * "Software"), to deal in the Software without restriction, including
      7  * without limitation the rights to use, copy, modify, merge, publish,
      8  * distribute, sub license, and/or sell copies of the Software, and to
      9  * permit persons to whom the Software is furnished to do so, subject to
     10  * the following conditions:
     11  *
     12  * The above copyright notice and this permission notice (including the
     13  * next paragraph) shall be included in all copies or substantial portions
     14  * of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
     19  * IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE LIABLE FOR
     20  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
     21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
     22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     23  */
     24 
     25 /**
     26  * \file va_intel_fei.h
     27  * \brief The Intel FEI (Flexible Encoding Infrastructure) encoding API
     28  *
     29  * This file contains the \ref api_intel_fei "Intel FEI (Flexible Encoding Infrastructure) encoding API".
     30  */
     31 
     32 #ifndef VA_INTEL_FEI_H
     33 #define VA_INTEL_FEI_H
     34 
     35 #ifdef __cplusplus
     36 extern "C" {
     37 #endif
     38 
     39 #include <va/va_enc.h>
     40 
     41 /**
     42  * \defgroup api_intel_fei Intel FEI (Flexible Encoding Infrastructure) encoding API
     43  *
     44  * @{
     45  */
     46 
     47 /** \brief FEI frame level control buffer for H.264 */
     48 typedef struct _VAEncMiscParameterFEIFrameControlH264Intel {
     49     unsigned int function; /* one of the VAConfigAttribEncFunctionType values */
     50     /** \brief MB (16x16) control input surface. It is valid only when (mb_input | mb_size_ctrl)
     51      * is set to 1. The data in this buffer correspond to the input source. 16x16 MB is in raster scan order,
     52      * each MB control data structure is defined by VAEncFEIMBControlBufferH264.
     53      * Buffer size shall not be less than the number of 16x16 blocks multiplied by
     54      * sizeof(VAEncFEIMBControlBufferH264Intel).
     55      * Note: if mb_qp is set, VAEncQpBufferH264 is expected.
     56      */
     57     VASurfaceID       mb_ctrl;
     58     /** \brief MV predictor. It is valid only when mv_predictor_enable is set to 1.
     59      * Each 16x16 block has one or more pair of motion vectors and the corresponding
     60      * reference indexes as defined by VAEncMVPredictorBufferH264. 16x16 block is in raster scan order.
     61      * Buffer size shall not be less than the number of 16x16 blocks multiplied by
     62      * sizeof(VAEncMVPredictorBufferH264). */
     63     VASurfaceID       mv_predictor;
     64 
     65     /** \brief number of MV predictors. It must not be greater than maximum supported MV predictor. */
     66     unsigned int      num_mv_predictors;
     67 
     68     /** \brief control parameters */
     69     unsigned int      max_len_sp                : 8;
     70     unsigned int      len_sp                    : 8;
     71     unsigned int      reserved0	                : 16;
     72 
     73     unsigned int      sub_mb_part_mask          : 7;
     74     unsigned int      intra_part_mask           : 5;
     75     unsigned int      multi_pred_l0             : 1;
     76     unsigned int      multi_pred_l1             : 1;
     77     unsigned int      sub_pel_mode              : 2;
     78     unsigned int      inter_sad 	            : 2;
     79     unsigned int      intra_sad                 : 2;
     80     unsigned int      distortion_type           : 1;
     81     unsigned int      repartition_check_enable  : 1;
     82     unsigned int      adaptive_search           : 1;
     83     unsigned int      mv_predictor_enable       : 1;
     84     unsigned int      mb_qp                     : 1;
     85     unsigned int      mb_input                  : 1;
     86     unsigned int      mb_size_ctrl              : 1;
     87     unsigned int      reserved1	                : 5;
     88 
     89     unsigned int      ref_width                 : 8;
     90     unsigned int      ref_height                : 8;
     91     unsigned int      search_window             : 3;
     92     unsigned int      reserved2                 : 13;
     93 } VAEncMiscParameterFEIFrameControlH264Intel;
     94 
     95 
     96 /** \brief FEI MB level control data structure */
     97 typedef struct _VAEncFEIMBControlH264Intel {
     98     /** \brief when set, correposndent MB is coded as skip */
     99     unsigned int force_to_skip       : 1;
    100     /** \brief when set, correposndent MB is coded as intra */
    101     unsigned int force_to_intra      : 1;
    102     unsigned int reserved1           : 30;
    103 
    104     /** \brief when mb_size_ctrl is set, size here is used to budget accumulatively. Set to 0xFF if don't care. */
    105     unsigned int max_size_in_word    : 8;
    106     unsigned int target_size_in_word : 8;
    107     unsigned int reserved2           : 16;
    108 
    109     unsigned int reserved3;
    110 } VAEncFEIMBControlH264Intel;
    111 
    112 
    113 /** \brief Application can use this definition as reference to allocate the buffer
    114  * based on MaxNumPredictor returned from attribute VAConfigAttribEncMVPredictorsIntel query.
    115  **/
    116 typedef struct _VAEncMVPredictorH264Intel {
    117     /** \brief Reference index corresponding to the entry of RefPicList0 & RefPicList1 in VAEncSliceParameterBufferH264.
    118      * Note that RefPicList0 & RefPicList1 needs to be the same for all slices.
    119      * ref_idx_l0_x : index to RefPicList0; ref_idx_l1_x : index to RefPicList1; x : 0 - MaxNumPredictor.
    120      **/
    121     unsigned int ref_idx_l0_0 : 4;
    122     unsigned int ref_idx_l1_0 : 4;
    123     unsigned int ref_idx_l0_1 : 4;
    124     unsigned int ref_idx_l1_1 : 4;
    125     unsigned int ref_idx_l0_2 : 4;
    126     unsigned int ref_idx_l1_2 : 4;
    127     unsigned int ref_idx_l0_3 : 4;
    128     unsigned int ref_idx_l1_3 : 4;
    129     unsigned int reserved;
    130     /** \brief MV. MaxNumPredictor must be the returned value from attribute VAConfigAttribEncMVPredictors query.
    131      * Even application doesn't use the maximum predictors, the VAEncMVPredictorH264 structure size
    132      * has to be defined as maximum so each MB can be at a fixed location.
    133      * Note that 0x8000 must be used for correspondent intra block.
    134      **/
    135     struct _mv
    136     {
    137     /** \brief Motion vector corresponding to ref0x_index.
    138      * mv0[0] is horizontal motion vector and mv0[1] is vertical motion vector. */
    139         short    mv0[2];
    140     /** \brief Motion vector corresponding to ref1x_index.
    141      * mv1[0] is horizontal motion vector and mv1[1] is vertical motion vector. */
    142         short    mv1[2];
    143     } mv[4]; /* MaxNumPredictor is 4 */
    144 } VAEncMVPredictorH264Intel;
    145 
    146 
    147 /** \brief FEI output */
    148 /**
    149  * Motion vector output is per 4x4 block. For each 4x4 block there is a pair of MVs
    150  * for RefPicList0 and RefPicList1 and each MV is 4 bytes including horizontal and vertical directions.
    151  * Depending on Subblock partition, for the shape that is not 4x4, the MV is replicated
    152  * so each 4x4 block has a pair of MVs. The 16x16 block has 32 MVs (128 bytes).
    153  * 0x8000 is used for correspondent intra block. The 16x16 block is in raster scan order,
    154  * within the 16x16 block, each 4x4 block MV is ordered as below in memory.
    155  * The buffer size shall be greater than or equal to the number of 16x16 blocks multiplied by 128 bytes.
    156  * Note that, when separate ENC and PAK is enabled, the exact layout of this buffer is needed for PAK input.
    157  * App can reuse this buffer, or copy to a different buffer as PAK input.
    158  *                      16x16 Block
    159  *        -----------------------------------------
    160  *        |    1    |    2    |    5    |    6    |
    161  *        -----------------------------------------
    162  *        |    3    |    4    |    7    |    8    |
    163  *        -----------------------------------------
    164  *        |    9    |    10   |    13   |    14   |
    165  *        -----------------------------------------
    166  *        |    11   |    12   |    15   |    16   |
    167  *        -----------------------------------------
    168  **/
    169 
    170 /** \brief VAEncFEIModeBufferIntel defines the data structure for VAEncFEIModeBufferTypeIntel per 16x16 MB block.
    171  * The 16x16 block is in raster scan order. Buffer size shall not be less than the number of 16x16 blocks
    172  * multiplied by sizeof(VAEncFEIModeBufferH264Intel). Note that, when separate ENC and PAK is enabled,
    173  * the exact layout of this buffer is needed for PAK input. App can reuse this buffer,
    174  * or copy to a different buffer as PAK input, reserved elements must not be modified when used as PAK input.
    175  **/
    176 typedef struct _VAEncFEIModeBufferH264Intel {
    177     unsigned int    reserved0;
    178     unsigned int    reserved1[3];
    179 
    180     unsigned int    inter_mb_mode            : 2;
    181     unsigned int    mb_skip_flag             : 1;
    182     unsigned int    reserved00               : 1;
    183     unsigned int    intra_mb_mode            : 2;
    184     unsigned int    reserved01               : 1;
    185     unsigned int    field_mb_polarity_flag   : 1;
    186     unsigned int    mb_type                  : 5;
    187     unsigned int    intra_mb_flag	         : 1;
    188     unsigned int    field_mb_flag            : 1;
    189     unsigned int    transform8x8_flag        : 1;
    190     unsigned int    reserved02               : 1;
    191     unsigned int    dc_block_coded_cr_flag   : 1;
    192     unsigned int    dc_block_coded_cb_flag   : 1;
    193     unsigned int    dc_block_coded_y_flag    : 1;
    194     unsigned int    reserved03               : 12;
    195 
    196     unsigned int    horz_origin              : 8;
    197     unsigned int    vert_origin              : 8;
    198     unsigned int    cbp_y                    : 16;
    199 
    200     unsigned int    cbp_cb                   : 16;
    201     unsigned int    cbp_cr                   : 16;
    202 
    203     unsigned int    qp_prime_y               : 8;
    204     unsigned int    reserved30               : 17;
    205     unsigned int    mb_skip_conv_disable     : 1;
    206     unsigned int    is_last_mb               : 1;
    207     unsigned int    enable_coefficient_clamp : 1;
    208     unsigned int    direct8x8_pattern        : 4;
    209 
    210     union
    211     {
    212         /* Intra MBs */
    213         struct
    214         {
    215             unsigned int   luma_intra_pred_modes0 : 16;
    216             unsigned int   luma_intra_pred_modes1 : 16;
    217 
    218             unsigned int   luma_intra_pred_modes2 : 16;
    219             unsigned int   luma_intra_pred_modes3 : 16;
    220 
    221             unsigned int   mb_intra_struct        : 8;
    222             unsigned int   reserved60             : 24;
    223         } intra_mb;
    224 
    225         /* Inter MBs */
    226         struct
    227         {
    228             unsigned int   sub_mb_shapes          : 8;
    229             unsigned int   sub_mb_pred_modes      : 8;
    230             unsigned int   reserved40             : 16;
    231 
    232             unsigned int   ref_idx_l0_0           : 8;
    233             unsigned int   ref_idx_l0_1           : 8;
    234             unsigned int   ref_idx_l0_2           : 8;
    235             unsigned int   ref_idx_l0_3           : 8;
    236 
    237             unsigned int   ref_idx_l1_0           : 8;
    238             unsigned int   ref_idx_l1_1           : 8;
    239             unsigned int   ref_idx_l1_2           : 8;
    240             unsigned int   ref_idx_l1_3           : 8;
    241         } inter_mb;
    242     } mb_mode;
    243 
    244     unsigned int   reserved70                : 16;
    245     unsigned int   target_size_in_word       : 8;
    246     unsigned int   max_size_in_word          : 8;
    247 
    248     unsigned int   reserved2[4];
    249 } VAEncFEIModeBufferH264Intel;
    250 
    251 /** \brief VAEncFEIDistortionBufferIntel defines the data structure for
    252  * VAEncFEIDistortionBufferType per 16x16 MB block. The 16x16 block is in raster scan order.
    253  * Buffer size shall not be less than the number of 16x16 blocks multiple by sizeof(VAEncFEIDistortionBufferIntel).
    254  **/
    255 typedef struct _VAEncFEIDistortionBufferH264Intel {
    256     /** \brief Inter-prediction-distortion associated with motion vector i (co-located with subblock_4x4_i).
    257      * Its meaning is determined by sub-shape. It must be zero if the corresponding sub-shape is not chosen.
    258      **/
    259     unsigned short  inter_distortion[16];
    260     unsigned short  best_inter_distortion;
    261     unsigned short  best_intra_distortion;
    262 } VAEncFEIDistortionBufferH264Intel;
    263 
    264 #ifdef __cplusplus
    265 }
    266 #endif
    267 
    268 #endif /* VA_INTEL_FEI_H */
    269