| /external/llvm/lib/CodeGen/ |
| CalcSpillWeights.cpp | 35 MachineRegisterInfo &MRI = MF.getRegInfo();
37 for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
39 if (MRI.reg_nodbg_empty(Reg))
48 const MachineRegisterInfo &mri) {
66 const TargetRegisterClass *rc = mri.getRegClass(reg);
132 MachineRegisterInfo &mri = MF.getRegInfo(); local
146 bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
152 I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end();
186 unsigned hint = copyHint(mi, li.reg, tri, mri);
[all...] |
| /external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| WebAssemblyMCCodeEmitter.cpp | 31 const MCRegisterInfo &MRI;
34 WebAssemblyMCCodeEmitter(const MCInstrInfo &, const MCRegisterInfo &mri,
36 : MRI(mri) {}
63 const MCRegisterInfo &MRI,
65 return new WebAssemblyMCCodeEmitter(MCII, MRI, Ctx);
72 return MRI.getEncodingValue(MO.getReg());
|
| /external/llvm/include/llvm/MC/ |
| MCInstPrinter.h | 46 const MCRegisterInfo &MRI;
62 const MCRegisterInfo &mri)
63 : CommentStream(nullptr), MAI(mai), MII(mii), MRI(mri), UseMarkup(0),
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonBitTracker.h | 26 HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri,
|
| HexagonBitSimplify.cpp | 169 MachineRegisterInfo &MRI);
171 unsigned &Begin, unsigned &Width, MachineRegisterInfo &MRI);
173 unsigned NewSR, MachineRegisterInfo &MRI);
175 unsigned NewR, unsigned NewSR, MachineRegisterInfo &MRI);
185 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
187 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
326 MachineRegisterInfo &MRI) {
330 auto Begin = MRI.use_begin(OldR), End = MRI.use_end();
341 unsigned NewSR, MachineRegisterInfo &MRI) {
[all...] |
| HexagonBitTracker.cpp | 26 MachineRegisterInfo &mri,
29 : MachineEvaluator(tri, mri), MF(mf), MFI(*mf.getFrameInfo()), TII(tii) {
37 // meter will be passed in a register or in memory. What is given in MRI
42 // from MRI may not correspond to consecutive formal parameters from Func-
82 const TargetRegisterClass *RC = MRI.getRegClass(Reg);
145 // call site, and we should take advantage of this knowledge. The MRI
[all...] |
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 37 const MCRegisterInfo &MRI;
40 R600MCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri)
41 : MCII(mcii), MRI(mri) { }
83 const MCRegisterInfo &MRI,
85 return new R600MCCodeEmitter(MCII, MRI);
158 return MRI.getEncodingValue(reg) >> HW_CHAN_SHIFT;
162 return MRI.getEncodingValue(RegNo) & HW_REG_MASK;
171 return MRI.getEncodingValue(MO.getReg());
|
| SIMCCodeEmitter.cpp | 38 const MCRegisterInfo &MRI;
47 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
49 : MCII(mcii), MRI(mri) { }
73 const MCRegisterInfo &MRI,
75 return new SIMCCodeEmitter(MCII, MRI, Ctx);
204 const MCRegisterClass &RC = MRI.getRegClass(RCID);
248 return MRI.getEncodingValue(MO.getReg());
266 const MCRegisterClass &RC = MRI.getRegClass(RCID);
|
| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 32 const MCRegisterInfo &MRI;
36 BPFMCCodeEmitter(const MCRegisterInfo &mri, bool IsLittleEndian)
37 : MRI(mri), IsLittleEndian(IsLittleEndian) {}
64 const MCRegisterInfo &MRI,
66 return new BPFMCCodeEmitter(MRI, true);
70 const MCRegisterInfo &MRI,
72 return new BPFMCCodeEmitter(MRI, false);
80 return MRI.getEncodingValue(MO.getReg());
159 Encoding = MRI.getEncodingValue(Op1.getReg())
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/ |
| malis.d | 2 #as: -m68hc11 --mri -I$srcdir/$subdir
|
| malis.s | 130 # This does not work with GAS in mri mode, the instruction 'if L2 < 24'
|
| /external/llvm/lib/MC/ |
| MCContext.cpp | 37 MCContext::MCContext(const MCAsmInfo *mai, const MCRegisterInfo *mri,
40 : SrcMgr(mgr), MAI(mai), MRI(mri), MOFI(mofi), Allocator(),
|
| /toolchain/binutils/binutils-2.25/gas/ |
| macro.c | 57 /* Whether we are in MRI mode. */
76 macro_init (int alternate, int mri, int strip_at,
82 macro_mri = mri;
95 /* Switch in and out of MRI mode on the fly. */
98 macro_mri_mode (int mri)
100 macro_mri = mri;
599 /* The same MRI assemblers which treat '@' characters also use
974 but we can't, because the == might be in the MRI
975 comment field, and, since the nature of the MRI
1308 /* Handle the MRI IRP and IRPC pseudo-ops. These are handled as
[all...] |
| /toolchain/binutils/binutils-2.25/ld/ |
| Makefile.am | 502 mri.c ldcref.c pe-dll.c pep-dll.c ldlex-wrapper.c \
507 ldwrite.h mri.h deffile.h pe-dll.h pep-dll.h \
518 mri.@OBJEXT@ ldctor.@OBJEXT@ ldmain.@OBJEXT@ $(PLUGIN_OBJECT) \
[all...] |
