| /external/llvm/lib/Target/AMDGPU/ |
| R600InstrInfo.cpp | 93 bool R600InstrInfo::isMov(unsigned Opcode) const {
96 switch(Opcode) {
107 // an opcode falls into this category.
108 bool R600InstrInfo::isPlaceHolderOpcode(unsigned Opcode) const {
109 switch (Opcode) {
116 bool R600InstrInfo::isReductionOp(unsigned Opcode) const {
120 bool R600InstrInfo::isCubeOp(unsigned Opcode) const {
121 switch(Opcode) {
131 bool R600InstrInfo::isALUInstr(unsigned Opcode) const {
132 unsigned TargetFlags = get(Opcode).TSFlags
[all...] |
| SIInstrInfo.cpp | 362 unsigned Opcode;
395 Opcode = AMDGPU::S_MOV_B64;
400 Opcode = AMDGPU::S_MOV_B64;
405 Opcode = AMDGPU::S_MOV_B64;
418 Opcode = AMDGPU::V_MOV_B32_e32;
423 Opcode = AMDGPU::V_MOV_B32_e32;
429 Opcode = AMDGPU::V_MOV_B32_e32;
435 Opcode = AMDGPU::V_MOV_B32_e32;
441 Opcode = AMDGPU::V_MOV_B32_e32;
461 get(Opcode), RI.getSubReg(DestReg, SubIdx))
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | [all...] |
| ARMExpandPseudoInsts.cpp | 332 static const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) {
344 std::end(NEONLdStTable), Opcode);
345 if (I != std::end(NEONLdStTable) && I->PseudoOpc == Opcode)
[all...] |
| ARMLoadStoreOptimizer.cpp | 139 bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg,
143 bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg,
175 unsigned Opcode = MI->getOpcode();
176 bool isAM3 = Opcode == ARM::LDRD || Opcode == ARM::STRD;
180 if (Opcode == ARM::t2LDRi12 || Opcode == ARM::t2LDRi8 ||
181 Opcode == ARM::t2STRi12 || Opcode == ARM::t2STRi8 ||
182 Opcode == ARM::t2LDRDi8 || Opcode == ARM::t2STRDi8 |
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsConstantIslandPass.cpp | 100 static bool isUnconditionalBranch(unsigned int Opcode) {
101 switch (Opcode) {
110 static unsigned int longformBranchOpcode(unsigned int Opcode) {
111 switch (Opcode) {
139 static unsigned int branchMaxOffsets(unsigned int Opcode) {
141 switch (Opcode) {
327 /// opcode.
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 723 unsigned Opcode;
729 Opcode = NVPTX::LD_i8_avar;
732 Opcode = NVPTX::LD_i16_avar;
735 Opcode = NVPTX::LD_i32_avar;
738 Opcode = NVPTX::LD_i64_avar;
741 Opcode = NVPTX::LD_f32_avar;
744 Opcode = NVPTX::LD_f64_avar;
752 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops);
757 Opcode = NVPTX::LD_i8_asi;
760 Opcode = NVPTX::LD_i16_asi
[all...] |
| NVPTXISelLowering.cpp | 289 const char *NVPTXTargetLowering::getTargetNodeName(unsigned Opcode) const {
290 switch ((NVPTXISD::NodeType)Opcode) {
1311 unsigned opcode = NVPTXISD::StoreParam; local
1456 unsigned opcode; local
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 425 unsigned Opcode;
427 default: Opcode = PPC::NOP; break;
428 case PPC::DIR_PWR6: Opcode = PPC::NOP_GT_PWR6; break;
429 case PPC::DIR_PWR7: Opcode = PPC::NOP_GT_PWR7; break;
430 case PPC::DIR_PWR8: Opcode = PPC::NOP_GT_PWR7; break; /* FIXME: Update when P8 InstrScheduling model is ready */
434 BuildMI(MBB, MI, DL, get(Opcode));
746 unsigned OpCode = Is64Bit ? PPC::ISEL8 : PPC::ISEL;
782 BuildMI(MBB, MI, dl, get(OpCode), DestReg)
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 106 // given by Opcode. The operands are: Input (R2), Start (I3), End (I4) and
119 : Opcode(Op), BitSize(N.getValueType().getSizeInBits()),
123 unsigned Opcode;
291 // Try to use RISBG or Opcode to implement OR or XOR node N.
293 SDNode *tryRxSBG(SDNode *N, unsigned Opcode);
297 // (Opcode UpperVal LowerVal)
301 // (Opcode (Opcode Op0 UpperVal) LowerVal)
302 SDNode *splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
305 // Try to use gather instruction Opcode to implement vector insertion N
[all...] |
| SystemZISelLowering.cpp | 45 : Op0(Op0In), Op1(Op1In), Opcode(0), ICmpType(0), CCValid(0), CCMask(0) {}
50 // The opcode that should be used to compare Op0 and Op1.
51 unsigned Opcode;
56 // The mask of CC values that Opcode can produce.
267 for (unsigned Opcode = 0; Opcode < ISD::BUILTIN_OP_END; ++Opcode)
268 if (getOperationAction(Opcode, VT) == Legal)
269 setOperationAction(Opcode, VT, Expand);
[all...] |
| SystemZInstrInfo.cpp | 49 // each having the opcode given by NewOpcode.
147 unsigned Opcode = getOpcodeForOffset(isHighReg(Reg) ? HighOpcode : LowOpcode,
149 MI->setDesc(get(Opcode));
173 unsigned Opcode;
177 Opcode = SystemZ::RISBHH;
179 Opcode = SystemZ::RISBHL;
181 Opcode = SystemZ::RISBLH;
188 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
431 // Return true if MI is a shift of type Opcode by Imm bits.
432 static bool isShift(MachineInstr *MI, unsigned Opcode, int64_t Imm)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | 547 static int Lookup(ArrayRef<TableEntry> Table, unsigned Opcode) {
548 const TableEntry *I = std::lower_bound(Table.begin(), Table.end(), Opcode);
549 if (I != Table.end() && I->from == Opcode)
737 static unsigned getConcreteOpcode(unsigned Opcode) {
739 int Opc = Lookup(OpcodeTable, Opcode);
790 int Opcode = Lookup(PopTable, I->getOpcode());
791 if (Opcode != -1) {
792 I->setDesc(TII->get(Opcode));
793 if (Opcode == X86::UCOM_FPPr)
[all...] |
| X86MCInstLower.cpp | 299 static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode) {
315 Inst.setOpcode(Opcode);
349 unsigned Opcode) {
394 Inst.setOpcode(Opcode);
480 default: llvm_unreachable("Invalid opcode");
505 default: llvm_unreachable("Invalid opcode");
521 unsigned Opcode = OutMI.getOpcode();
524 OutMI.setOpcode(Opcode);
557 unsigned Opcode;
559 default: llvm_unreachable("Invalid opcode");
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Reassociate.cpp | 225 /// Return true if V is an instruction of the specified opcode and if it
227 static BinaryOperator *isReassociableOp(Value *V, unsigned Opcode) {
229 cast<Instruction>(V)->getOpcode() == Opcode &&
385 static void IncorporateWeight(APInt &LHS, const APInt &RHS, unsigned Opcode) {
403 if (Instruction::isIdempotent(Opcode)) {
410 if (Instruction::isNilpotent(Opcode)) {
416 if (Opcode == Instruction::Add || Opcode == Instruction::FAdd) {
422 assert((Opcode == Instruction::Mul || Opcode == Instruction::FMul) &
[all...] |
| /art/compiler/utils/arm/ |
| constants_arm.h | 133 enum Opcode {
154 std::ostream& operator<<(std::ostream& os, const Opcode& rhs);
284 Opcode OpcodeField() const {
285 return static_cast<Opcode>(Bits(kOpcodeShift, kOpcodeBits));
|
| /art/runtime/ |
| dex_instruction.h | 83 #define INSTRUCTION_ENUM(opcode, cname, p, f, r, i, a, v) cname = opcode,
150 kStore = 0x0080000, // store opcode
151 kLoad = 0x0100000, // load opcode
155 kExperimental = 0x1000000, // is an experimental opcode
192 int result = kInstructionSizeInCodeUnits[Opcode()];
218 DCHECK(FormatOf(Opcode()) >= k10x && FormatOf(Opcode()) <= k10t);
224 DCHECK(FormatOf(Opcode()) >= k20t && FormatOf(Opcode()) <= k25x)
[all...] |
| /external/clang/include/clang/Analysis/Analyses/ |
| ThreadSafetyTIL.h | 72 /// Opcode for unary arithmetic operations.
79 /// Opcode for binary arithmetic operations.
99 /// Opcode for cast operations.
118 /// Return the name of a unary opcode.
121 /// Return the name of a binary opcode.
262 TIL_Opcode opcode() const { return static_cast<TIL_Opcode>(Opcode); } function in class:clang::threadSafety::SExpr
300 : Opcode(Op), Reserved(0), Flags(0), SExprID(0), Block(nullptr) {}
302 : Opcode(E.Opcode), Reserved(0), Flags(E.Flags), SExprID(0)
[all...] |
| /external/javassist/src/main/javassist/bytecode/ |
| Opcode.java | 26 public interface Opcode {
440 0, // wide, 196 depends on the following opcode
|
| /external/llvm/examples/Kaleidoscope/Chapter8/ |
| toy.cpp | 242 char Opcode;
246 UnaryExprAST(char Opcode, std::unique_ptr<ExprAST> Operand)
247 : Opcode(Opcode), Operand(std::move(Operand)) {}
250 ExprAST::dump(out << "unary" << Opcode, ind);
914 Function *F = getFunction(std::string("unary") + Opcode);
[all...] |
| /external/llvm/examples/Kaleidoscope/MCJIT/cached/ |
| toy.cpp | 159 char Opcode;
162 UnaryExprAST(char opcode, ExprAST *operand)
163 : Opcode(opcode), Operand(operand) {}
1031 Function *F = TheHelper->getFunction(MakeLegalFunctionName(std::string("unary")+Opcode));
[all...] |
| /external/llvm/examples/Kaleidoscope/MCJIT/complete/ |
| toy.cpp | 178 char Opcode;
181 UnaryExprAST(char opcode, ExprAST *operand)
182 : Opcode(opcode), Operand(operand) {}
1102 MakeLegalFunctionName(std::string("unary") + Opcode));
[all...] |
| /external/llvm/examples/Kaleidoscope/MCJIT/initial/ |
| toy.cpp | 136 char Opcode;
139 UnaryExprAST(char opcode, ExprAST *operand)
140 : Opcode(opcode), Operand(operand) {}
889 Function *F = TheHelper->getFunction(MakeLegalFunctionName(std::string("unary")+Opcode));
[all...] |
| /external/llvm/examples/Kaleidoscope/MCJIT/lazy/ |
| toy.cpp | 138 char Opcode;
141 UnaryExprAST(char opcode, ExprAST *operand)
142 : Opcode(opcode), Operand(operand) {}
929 Function *F = TheHelper->getFunction(MakeLegalFunctionName(std::string("unary")+Opcode));
[all...] |
| /external/llvm/examples/Kaleidoscope/Orc/fully_lazy/ |
| toy.cpp | 143 UnaryExprAST(char Opcode, std::unique_ptr<ExprAST> Operand)
144 : Opcode(std::move(Opcode)), Operand(std::move(Operand)) {}
148 char Opcode;
771 std::string FnName = MakeLegalFunctionName(std::string("unary")+Opcode);
[all...] |
