| /external/llvm/lib/Target/PowerPC/ |
| PPCMachineFunctionInfo.h | 49 /// Does this function spill using instructions with only r+r (not r+i)
74 /// calls. Used for creating an area before the register spill area.
93 /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4.
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| /external/llvm/test/CodeGen/XCore/ |
| scavenging.ll | 70 ; !FP + large frame: spill SR+SR = entsp 2 + 100000
76 ; scavenge r4 using SR spill slot
82 ; scavenge r5 using SR spill slot
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| /art/compiler/debug/dwarf/ |
| register.h | 34 // It would be much simpler to always spill whole D registers.
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| /art/compiler/jni/quick/ |
| calling_convention.h | 252 // Registers to spill to caller's out registers on entry.
267 // | { Return value spill } | (live on return slow paths)
303 // Callee save registers to spill prior to native code (which may clobber)
306 // Spill mask values
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| /external/llvm/include/llvm/CodeGen/ |
| PBQPRAConstraint.h | 38 /// constraints (e.g. Spill-costs, interference, coalescing).
|
| PseudoSourceValue.h | 32 /// a memory access references the functions stack frame (e.g., a spill slot),
173 /// e.g., a spill slot.
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| VirtRegMap.h | 13 // adds spill code and rewrites virtual into physical register references.
63 /// createSpillSlot - Allocate a spill slot for RC from MFI.
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| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 93 /// frame. During these steps, it may be necessary to spill registers.
96 /// \param OffsetFromTop the spill offset from the top of the frame.
119 /// \param OffsetFromTop the spill offset from the top of the frame.
165 assert(XFI->hasEHSpillSlot() && "There are no EH register spill slots");
187 /// Restore clobbered registers with their spill slot value.
324 // We do not save/spill these registers.
437 // Add the callee-saved register as live-in. It's killed at the spill.
551 // The unwinder expects to find spill slots for the exception info regs R0
553 // info. N.B. we do not spill or restore R0, R1 during normal operation.
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| /external/llvm/test/CodeGen/AArch64/ |
| arm64-tls-dynamic-together.ll | 7 ; glue) then LLVM will separate them quite happily (with a spill at O0, hence
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| /external/llvm/test/CodeGen/Mips/ |
| emergency-spill-slot-near-fp.ll | 1 ; Check that register scavenging spill slot is close to $fp.
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| no-odd-spreg.ll | 18 ; allocator will choose $f12 and $f13 to avoid the spill/reload.
21 ; will be forced to spill/reload either %a or %0.
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| /external/llvm/test/MC/Mips/ |
| xgot.s | 38 sw $ra, 20($sp) # 4-byte Folded Spill
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4_reg_allocate.cpp | 207 /* Failed to allocate registers. Spill a reg, and the caller will
212 fail("no register to spill\n");
258 * spill/unspill we'll have to do, and guess that the insides of
326 /* Generate spill/unspill instructions for the objects being spilled. */
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| /external/v8/src/crankshaft/ia32/ |
| lithium-gap-resolver-ia32.h | 78 // If we had to spill on demand, the currently spilled register's
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| /external/v8/src/crankshaft/x87/ |
| lithium-gap-resolver-x87.h | 78 // If we had to spill on demand, the currently spilled register's
|
| /external/v8/test/webkit/ |
| dfg-weak-js-constant-silent-fill.js | 25 "Tests that DFG silent spill and fill of WeakJSConstants does not result in nonsense."
|
| /external/webrtc/webrtc/modules/video_coding/codecs/vp9/ |
| screenshare_layers.cc | 33 // The upper layer is always the layer we spill frames
|
| /packages/apps/SoundRecorder/res/values-nb/ |
| strings.xml | 22 <string name="review_message" msgid="201616012287839474">"Spill tilbake melding"</string>
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| unwind-err.l | 22 .*:29: Error: .spill outside of prologue
|
| psn.s | 207 st8.spill [ r65 ] = r93
208 st8.spill.d1 [ r65 ] = r93
209 st8.spill.nt1 [ r65 ] = r93
210 st8.spill.d2 [ r65 ] = r93
211 st8.spill.nt2 [ r65 ] = r93
212 st8.spill.nta [ r65 ] = r93
213 st8.spill.d3 [ r65 ] = r93
214 st8.spill.d4 [ r65 ] = r93
215 st8.spill.d5 [ r65 ] = r93
216 st8.spill.d6 [ r65 ] = r9
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| StatepointLowering.cpp | 126 // Spill location is known for gc relocates
172 // We use this function to eliminate spill store completely, while
187 // Here we want to reserve spill slot for 'i', but not for 'i+1'. If we just
197 /// statepoint spilling. If we can find a spill slot for the incoming value,
207 // We won't need to spill this, so no need to check for previously
251 /// StackMap section. It has no effect on the number of spill slots required
415 /// Spill a value incoming to the statepoint. It might be either part of
417 /// or gcstate. In both cases unconditionally spill it on the stack unless it
471 // Otherwise, locate a spill slot and explicitly spill it so i
[all...] |
| StatepointLowering.h | 29 /// used for a debug mode consistency check only). The spill slot tracking
44 /// Returns the spill location of a value incoming to the current
|
| /system/core/libpixelflinger/codeflinger/ |
| texturing.cpp | 383 CONTEXT_STORE(s.reg, generated_vars.texture[i].spill[0]);
384 CONTEXT_STORE(t.reg, generated_vars.texture[i].spill[1]);
407 // We don't have a way to spill registers automatically
408 // spill depth and AA regs, when we know we may have to.
409 // build the spill list...
433 Spill spill(registerFile(), *this, spill_list);
459 CONTEXT_LOAD(s.reg, generated_vars.texture[i].spill[0]);
460 CONTEXT_LOAD(t.reg, generated_vars.texture[i].spill[1]);
610 CONTEXT_STORE(s.reg, generated_vars.texture[i].spill[0])
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsMachineFunction.h | 74 // epilogues and additional spill slots.
136 /// FrameIndex for expanding BuildPairF64 nodes to spill and reload when the
|
| /external/llvm/test/CodeGen/SystemZ/ |
| frame-18.ll | 6 ; We need to allocate a 4-byte spill slot, rounded to 8 bytes. The frame
52 ; Same for i64, except that the full spill slot is used.
|
