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/toolchain/binutils/binutils-2.25/gas/config/
tc-ia64.c	`[all...]`
/packages/apps/Settings/res/values-nb/
strings.xml	`[all...]`
/external/llvm/lib/CodeGen/SelectionDAG/
LegalizeDAG.cpp	`94 /// is necessary to spill the vector being inserted into to memory, perform 595 /// is necessary to spill the vector being inserted into to memory, perform 604 // If the target doesn't support this, we have to spill the input vector [all...]`
LegalizeVectorTypes.cpp	`848 // Spill the vector to the stack. [all...]`
/art/compiler/optimizing/
code_generator_mips.cc	`644 // Else, spill V0 (arbitrary choice) and use it as a scratch register (it will be 694 // Spill callee-saved registers. [all...]`
/external/v8/src/crankshaft/arm/
lithium-codegen-arm.cc	`759 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
/external/v8/src/crankshaft/ia32/
lithium-codegen-ia32.cc	`775 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
lithium-ia32.cc	`437 // Reserve the first spill slot for the state of dynamic alignment. [all...]`
/external/v8/src/crankshaft/mips/
lithium-codegen-mips.cc	`735 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
/external/v8/src/crankshaft/mips64/
lithium-codegen-mips64.cc	`723 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
/external/v8/src/crankshaft/ppc/
lithium-codegen-ppc.cc	`702 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
/external/v8/src/crankshaft/x64/
lithium-codegen-x64.cc	`697 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
/external/v8/src/crankshaft/x87/
lithium-codegen-x87.cc	`1045 // [incoming arguments] [spill slots] [pushed outgoing arguments] [all...]`
/art/oatdump/
oatdump.cc	`[all...]`
/cts/tests/camera/src/android/hardware/camera2/cts/
CaptureRequestTest.java	`[all...]`
/external/boringssl/src/crypto/sha/asm/
sha1-x86_64.pl	`45 # 32-bit code is that 64-bit code doesn't have to spill @X[] elements [all...]`
/external/llvm/docs/
WritingAnLLVMBackend.rst	`489 int Size = 0; // spill size, in bits; zero lets tblgen pick the size [all...]`
/external/llvm/lib/Support/
APInt.cpp	`[all...]`
/external/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp	`804 // TODO: Assume we will spill without optimizations. [all...]`
SIInstrInfo.cpp	`576 " spill register"); [all...]`
/external/llvm/lib/Target/ARM/
ARMConstantIslandPass.cpp	`497 // undo the spill / restore of LR if possible. [all...]`
/external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp	`461 // perhaps the spill and reload of live-exit values would handle this?) [all...]`
/external/llvm/lib/Target/X86/
X86InstrInfo.cpp	`50 NoFusing("disable-spill-fusing", 51 cl::desc("Disable fusing of spill code into instructions")); [all...]`
/external/llvm/test/CodeGen/X86/
stack-folding-xop.ll	`8 ; By including a nop call with sideeffects we can force a partial register spill of the [all...]`
vselect-minmax.ll	`[all...]`

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